mirror of https://gitee.com/openkylin/linux.git
159 lines
3.4 KiB
Plaintext
159 lines
3.4 KiB
Plaintext
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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&pllss_clocks {
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timer1_fck: timer1_fck@2e0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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&aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
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ti,bit-shift = <3>;
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reg = <0x2e0>;
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};
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timer2_fck: timer2_fck@2e0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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&aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
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ti,bit-shift = <6>;
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reg = <0x2e0>;
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};
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sysclk18_ck: sysclk18_ck@2f0 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&rtcosc_ck>, <&rtcdivider_ck>;
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ti,bit-shift = <0>;
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reg = <0x02f0>;
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};
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};
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&scm_clocks {
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devosc_ck: devosc_ck@40 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&virt_20000000_ck>, <&virt_19200000_ck>;
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ti,bit-shift = <21>;
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reg = <0x0040>;
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};
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/* Optional auxosc, 20 - 30 MHz range, assume 22.5729 MHz by default */
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auxosc_ck: auxosc_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <22572900>;
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};
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/* Optional 32768Hz crystal or clock on RTCOSC pins */
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rtcosc_ck: rtcosc_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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/* Optional external clock on TCLKIN pin, set rate in baord dts file */
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tclkin_ck: tclkin_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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};
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virt_20000000_ck: virt_20000000_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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virt_19200000_ck: virt_19200000_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <19200000>;
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};
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mpu_ck: mpu_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <1000000000>;
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};
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sysclk4_ck: sysclk4_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <222000000>;
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};
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sysclk6_ck: sysclk6_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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};
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sysclk10_ck: sysclk10_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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};
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cpsw_125mhz_gclk: cpsw_125mhz_gclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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};
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cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <250000000>;
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};
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};
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&prcm_clocks {
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osc_src_ck: osc_src_ck {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&devosc_ck>;
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clock-mult = <1>;
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clock-div = <1>;
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};
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mpu_clksrc_ck: mpu_clksrc_ck@40 {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&devosc_ck>, <&rtcdivider_ck>;
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ti,bit-shift = <0>;
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reg = <0x0040>;
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};
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/* Fixed divider clock 0.0016384 * devosc */
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rtcdivider_ck: rtcdivider_ck {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&devosc_ck>;
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clock-mult = <128>;
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clock-div = <78125>;
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};
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aud_clkin0_ck: aud_clkin0_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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aud_clkin1_ck: aud_clkin1_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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aud_clkin2_ck: aud_clkin2_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <20000000>;
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};
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};
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