mirror of https://gitee.com/openkylin/linux.git
47 lines
1.4 KiB
Plaintext
47 lines
1.4 KiB
Plaintext
Rockchip specific extensions to the Synopsys Designware HDMI
|
|
================================
|
|
|
|
Required properties:
|
|
- compatible: "rockchip,rk3288-dw-hdmi";
|
|
- reg: Physical base address and length of the controller's registers.
|
|
- clocks: phandle to hdmi iahb and isfr clocks.
|
|
- clock-names: should be "iahb" "isfr"
|
|
- rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
|
|
- interrupts: HDMI interrupt number
|
|
- ports: contain a port node with endpoint definitions as defined in
|
|
Documentation/devicetree/bindings/media/video-interfaces.txt. For
|
|
vopb,set the reg = <0> and set the reg = <1> for vopl.
|
|
- reg-io-width: the width of the reg:1,4, the value should be 4 on
|
|
rk3288 platform
|
|
|
|
Optional properties
|
|
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
|
|
- clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
|
|
|
|
Example:
|
|
hdmi: hdmi@ff980000 {
|
|
compatible = "rockchip,rk3288-dw-hdmi";
|
|
reg = <0xff980000 0x20000>;
|
|
reg-io-width = <4>;
|
|
ddc-i2c-bus = <&i2c5>;
|
|
rockchip,grf = <&grf>;
|
|
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
|
|
clock-names = "iahb", "isfr";
|
|
status = "disabled";
|
|
ports {
|
|
hdmi_in: port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
hdmi_in_vopb: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&vopb_out_hdmi>;
|
|
};
|
|
hdmi_in_vopl: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&vopl_out_hdmi>;
|
|
};
|
|
};
|
|
};
|
|
};
|