mirror of https://gitee.com/openkylin/linux.git
147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
/*
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* Serial port driver for BCM2835AUX UART
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*
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* Copyright (C) 2016 Martin Sperl <kernel@martin.sperl.org>
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*
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* Based on 8250_lpc18xx.c:
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* Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "8250.h"
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struct bcm2835aux_data {
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struct uart_8250_port uart;
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struct clk *clk;
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int line;
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};
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static int bcm2835aux_serial_probe(struct platform_device *pdev)
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{
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struct bcm2835aux_data *data;
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struct resource *res;
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int ret;
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/* allocate the custom structure */
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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/* initialize data */
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spin_lock_init(&data->uart.port.lock);
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data->uart.capabilities = UART_CAP_FIFO;
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data->uart.port.dev = &pdev->dev;
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data->uart.port.regshift = 2;
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data->uart.port.type = PORT_16550;
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data->uart.port.iotype = UPIO_MEM;
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data->uart.port.fifosize = 8;
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data->uart.port.flags = UPF_SHARE_IRQ |
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UPF_FIXED_PORT |
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UPF_FIXED_TYPE |
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UPF_SKIP_TEST;
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/* get the clock - this also enables the HW */
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data->clk = devm_clk_get(&pdev->dev, NULL);
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ret = PTR_ERR_OR_ZERO(data->clk);
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if (ret) {
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dev_err(&pdev->dev, "could not get clk: %d\n", ret);
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return ret;
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}
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/* get the interrupt */
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ret = platform_get_irq(pdev, 0);
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if (ret < 0) {
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dev_err(&pdev->dev, "irq not found - %i", ret);
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return ret;
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}
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data->uart.port.irq = ret;
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/* map the main registers */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "memory resource not found");
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return -EINVAL;
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}
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data->uart.port.membase = devm_ioremap_resource(&pdev->dev, res);
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ret = PTR_ERR_OR_ZERO(data->uart.port.membase);
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if (ret)
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return ret;
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/* Check for a fixed line number */
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ret = of_alias_get_id(pdev->dev.of_node, "serial");
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if (ret >= 0)
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data->uart.port.line = ret;
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/* enable the clock as a last step */
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ret = clk_prepare_enable(data->clk);
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if (ret) {
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dev_err(&pdev->dev, "unable to enable uart clock - %d\n",
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ret);
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return ret;
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}
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/* the HW-clock divider for bcm2835aux is 8,
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* but 8250 expects a divider of 16,
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* so we have to multiply the actual clock by 2
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* to get identical baudrates.
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*/
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data->uart.port.uartclk = clk_get_rate(data->clk) * 2;
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/* register the port */
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ret = serial8250_register_8250_port(&data->uart);
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if (ret < 0) {
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dev_err(&pdev->dev, "unable to register 8250 port - %d\n",
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ret);
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goto dis_clk;
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}
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data->line = ret;
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platform_set_drvdata(pdev, data);
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return 0;
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dis_clk:
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clk_disable_unprepare(data->clk);
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return ret;
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}
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static int bcm2835aux_serial_remove(struct platform_device *pdev)
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{
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struct bcm2835aux_data *data = platform_get_drvdata(pdev);
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serial8250_unregister_port(data->uart.port.line);
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clk_disable_unprepare(data->clk);
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return 0;
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}
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static const struct of_device_id bcm2835aux_serial_match[] = {
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{ .compatible = "brcm,bcm2835-aux-uart" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, bcm2835aux_serial_match);
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static struct platform_driver bcm2835aux_serial_driver = {
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.driver = {
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.name = "bcm2835-aux-uart",
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.of_match_table = bcm2835aux_serial_match,
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},
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.probe = bcm2835aux_serial_probe,
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.remove = bcm2835aux_serial_remove,
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};
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module_platform_driver(bcm2835aux_serial_driver);
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MODULE_DESCRIPTION("BCM2835 auxiliar UART driver");
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MODULE_AUTHOR("Martin Sperl <kernel@martin.sperl.org>");
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MODULE_LICENSE("GPL v2");
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