mirror of https://gitee.com/openkylin/linux.git
165 lines
3.7 KiB
Plaintext
165 lines
3.7 KiB
Plaintext
/*
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* Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx27.dtsi"
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/ {
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model = "Freescale i.MX27 Product Development Kit";
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compatible = "fsl,imx27-pdk", "fsl,imx27";
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memory {
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reg = <0xa0000000 0x08000000>;
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};
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usbphy {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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usbphy0: usbphy@0 {
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compatible = "usb-nop-xceiv";
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reg = <0>;
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clocks = <&clks 0>;
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clock-names = "main_clk";
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};
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};
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};
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&cspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_cspi2>;
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
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status = "okay";
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pmic: mc13783@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mc13783";
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reg = <0>;
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spi-cs-high;
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spi-max-frequency = <1000000>;
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interrupt-parent = <&gpio3>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
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regulators {
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vgen_reg: vgen {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vmmc1_reg: vmmc1 {
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <3000000>;
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};
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gpo1_reg: gpo1 {
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regulator-always-on;
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regulator-boot-on;
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};
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gpo3_reg: gpo3 {
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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};
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&fec {
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phy-mode = "mii";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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status = "okay";
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};
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&uart1 {
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fsl,uart-has-rtscts;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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dr_mode = "otg";
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fsl,usbphy = <&usbphy0>;
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phy_type = "ulpi";
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status = "okay";
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};
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&iomuxc {
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imx27-pdk {
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pinctrl_cspi2: cspi2grp {
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fsl,pins = <
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MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
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MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
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MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
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MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
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MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX27_PAD_SD3_CMD__FEC_TXD0 0x0
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MX27_PAD_SD3_CLK__FEC_TXD1 0x0
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MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
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MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
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MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
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MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
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MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
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MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
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MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
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MX27_PAD_ATA_DATA7__FEC_MDC 0x0
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MX27_PAD_ATA_DATA8__FEC_CRS 0x0
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MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
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MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
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MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
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MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
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MX27_PAD_ATA_DATA13__FEC_COL 0x0
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MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
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MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX27_PAD_UART1_TXD__UART1_TXD 0x0
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MX27_PAD_UART1_RXD__UART1_RXD 0x0
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MX27_PAD_UART1_CTS__UART1_CTS 0x0
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MX27_PAD_UART1_RTS__UART1_RTS 0x0
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
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MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
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MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
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MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
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MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
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MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
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MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
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MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
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MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
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MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
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MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
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MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
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>;
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};
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};
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};
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