mirror of https://gitee.com/openkylin/linux.git
645 lines
14 KiB
C
645 lines
14 KiB
C
#ifndef P54COMMON_H
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#define P54COMMON_H
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/*
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* Common code specific definitions for mac80211 Prism54 drivers
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*
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* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
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* Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
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*
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* Based on:
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* - the islsm (softmac prism54) driver, which is:
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* Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
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*
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* - LMAC API interface header file for STLC4560 (lmac_longbow.h)
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* Copyright (C) 2007 Conexant Systems, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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struct bootrec {
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__le32 code;
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__le32 len;
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u32 data[10];
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} __attribute__((packed));
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#define PDR_SYNTH_FRONTEND_MASK 0x0007
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#define PDR_SYNTH_FRONTEND_DUETTE3 0x0001
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#define PDR_SYNTH_FRONTEND_DUETTE2 0x0002
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#define PDR_SYNTH_FRONTEND_FRISBEE 0x0003
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#define PDR_SYNTH_FRONTEND_XBOW 0x0004
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#define PDR_SYNTH_FRONTEND_LONGBOW 0x0005
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#define PDR_SYNTH_IQ_CAL_MASK 0x0018
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#define PDR_SYNTH_IQ_CAL_PA_DETECTOR 0x0000
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#define PDR_SYNTH_IQ_CAL_DISABLED 0x0008
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#define PDR_SYNTH_IQ_CAL_ZIF 0x0010
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#define PDR_SYNTH_FAA_SWITCH_MASK 0x0020
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#define PDR_SYNTH_FAA_SWITCH_ENABLED 0x0020
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#define PDR_SYNTH_24_GHZ_MASK 0x0040
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#define PDR_SYNTH_24_GHZ_DISABLED 0x0040
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#define PDR_SYNTH_5_GHZ_MASK 0x0080
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#define PDR_SYNTH_5_GHZ_DISABLED 0x0080
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#define PDR_SYNTH_RX_DIV_MASK 0x0100
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#define PDR_SYNTH_RX_DIV_SUPPORTED 0x0100
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#define PDR_SYNTH_TX_DIV_MASK 0x0200
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#define PDR_SYNTH_TX_DIV_SUPPORTED 0x0200
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struct bootrec_exp_if {
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__le16 role;
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__le16 if_id;
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__le16 variant;
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__le16 btm_compat;
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__le16 top_compat;
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} __attribute__((packed));
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#define BR_DESC_PRIV_CAP_WEP BIT(0)
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#define BR_DESC_PRIV_CAP_TKIP BIT(1)
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#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
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#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
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#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
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#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
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struct bootrec_desc {
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__le16 modes;
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__le16 flags;
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__le32 rx_start;
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__le32 rx_end;
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u8 headroom;
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u8 tailroom;
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u8 tx_queues;
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u8 tx_depth;
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u8 privacy_caps;
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u8 rx_keycache_size;
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u8 time_size;
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u8 padding;
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u8 rates[16];
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u8 padding2[4];
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__le16 rx_mtu;
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} __attribute__((packed));
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#define BR_CODE_MIN 0x80000000
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#define BR_CODE_COMPONENT_ID 0x80000001
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#define BR_CODE_COMPONENT_VERSION 0x80000002
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#define BR_CODE_DEPENDENT_IF 0x80000003
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#define BR_CODE_EXPOSED_IF 0x80000004
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#define BR_CODE_DESCR 0x80000101
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#define BR_CODE_MAX 0x8FFFFFFF
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#define BR_CODE_END_OF_BRA 0xFF0000FF
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#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
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#define P54_HDR_FLAG_DATA_ALIGN BIT(14)
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#define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
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#define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
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#define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
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#define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
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#define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
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#define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
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#define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
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#define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
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#define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
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#define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
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#define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
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#define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
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#define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
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#define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
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#define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
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#define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
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#define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
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#define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
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#define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
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#define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
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#define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
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#define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
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/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
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struct pda_entry {
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__le16 len; /* includes both code and data */
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__le16 code;
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u8 data[0];
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} __attribute__ ((packed));
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struct eeprom_pda_wrap {
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__le32 magic;
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__le16 pad;
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__le16 len;
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__le32 arm_opcode;
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u8 data[0];
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} __attribute__ ((packed));
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struct p54_iq_autocal_entry {
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__le16 iq_param[4];
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} __attribute__ ((packed));
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struct pda_iq_autocal_entry {
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__le16 freq;
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struct p54_iq_autocal_entry params;
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} __attribute__ ((packed));
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struct pda_channel_output_limit {
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__le16 freq;
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u8 val_bpsk;
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u8 val_qpsk;
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u8 val_16qam;
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u8 val_64qam;
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u8 rate_set_mask;
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u8 rate_set_size;
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} __attribute__ ((packed));
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struct pda_pa_curve_data_sample_rev0 {
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u8 rf_power;
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u8 pa_detector;
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u8 pcv;
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} __attribute__ ((packed));
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struct pda_pa_curve_data_sample_rev1 {
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u8 rf_power;
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u8 pa_detector;
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u8 data_barker;
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u8 data_bpsk;
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u8 data_qpsk;
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u8 data_16qam;
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u8 data_64qam;
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} __attribute__ ((packed));
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struct p54_pa_curve_data_sample {
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u8 rf_power;
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u8 pa_detector;
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u8 data_barker;
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u8 data_bpsk;
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u8 data_qpsk;
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u8 data_16qam;
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u8 data_64qam;
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u8 padding;
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} __attribute__ ((packed));
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struct pda_pa_curve_data {
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u8 cal_method_rev;
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u8 channels;
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u8 points_per_channel;
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u8 padding;
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u8 data[0];
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} __attribute__ ((packed));
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struct pda_rssi_cal_entry {
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__le16 mul;
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__le16 add;
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} __attribute__ ((packed));
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struct pda_country {
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u8 regdomain;
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u8 alpha2[2];
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u8 flags;
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} __attribute__ ((packed));
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/*
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* Warning: Longbow's structures are bogus.
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*/
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struct p54_channel_output_limit_longbow {
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__le16 rf_power_points[12];
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} __attribute__ ((packed));
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struct p54_pa_curve_data_sample_longbow {
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__le16 rf_power;
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__le16 pa_detector;
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struct {
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__le16 data[4];
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} points[3] __attribute__ ((packed));
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} __attribute__ ((packed));
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struct pda_custom_wrapper {
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__le16 entries;
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__le16 entry_size;
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__le16 offset;
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__le16 len;
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u8 data[0];
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} __attribute__ ((packed));
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/*
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* this defines the PDR codes used to build PDAs as defined in document
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* number 553155. The current implementation mirrors version 1.1 of the
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* document and lists only PDRs supported by the ARM platform.
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*/
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/* common and choice range (0x0000 - 0x0fff) */
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#define PDR_END 0x0000
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#define PDR_MANUFACTURING_PART_NUMBER 0x0001
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#define PDR_PDA_VERSION 0x0002
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#define PDR_NIC_SERIAL_NUMBER 0x0003
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#define PDR_MAC_ADDRESS 0x0101
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#define PDR_REGULATORY_DOMAIN_LIST 0x0103
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#define PDR_TEMPERATURE_TYPE 0x0107
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#define PDR_PRISM_PCI_IDENTIFIER 0x0402
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/* ARM range (0x1000 - 0x1fff) */
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#define PDR_COUNTRY_INFORMATION 0x1000
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#define PDR_INTERFACE_LIST 0x1001
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#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
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#define PDR_OEM_NAME 0x1003
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#define PDR_PRODUCT_NAME 0x1004
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#define PDR_UTF8_OEM_NAME 0x1005
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#define PDR_UTF8_PRODUCT_NAME 0x1006
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#define PDR_COUNTRY_LIST 0x1007
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#define PDR_DEFAULT_COUNTRY 0x1008
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#define PDR_ANTENNA_GAIN 0x1100
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#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
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#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
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#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
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#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
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#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
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#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
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#define PDR_REGULATORY_POWER_LIMITS 0x1907
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#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
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#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
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#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
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/* reserved range (0x2000 - 0x7fff) */
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/* customer range (0x8000 - 0xffff) */
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#define PDR_BASEBAND_REGISTERS 0x8000
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#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
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/* used by our modificated eeprom image */
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#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM 0xDEAD
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#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM 0xBEEF
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#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM 0xB05D
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/* PDR definitions for default country & country list */
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#define PDR_COUNTRY_CERT_CODE 0x80
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#define PDR_COUNTRY_CERT_CODE_REAL 0x00
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#define PDR_COUNTRY_CERT_CODE_PSEUDO 0x80
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#define PDR_COUNTRY_CERT_BAND 0x40
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#define PDR_COUNTRY_CERT_BAND_2GHZ 0x00
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#define PDR_COUNTRY_CERT_BAND_5GHZ 0x40
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#define PDR_COUNTRY_CERT_IODOOR 0x30
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#define PDR_COUNTRY_CERT_IODOOR_BOTH 0x00
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#define PDR_COUNTRY_CERT_IODOOR_INDOOR 0x20
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#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
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#define PDR_COUNTRY_CERT_INDEX 0x0F
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struct p54_eeprom_lm86 {
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union {
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struct {
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__le16 offset;
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__le16 len;
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u8 data[0];
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} v1;
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struct {
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__le32 offset;
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__le16 len;
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u8 magic2;
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u8 pad;
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u8 magic[4];
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u8 data[0];
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} v2;
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} __attribute__ ((packed));
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} __attribute__ ((packed));
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enum p54_rx_decrypt_status {
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P54_DECRYPT_NONE = 0,
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P54_DECRYPT_OK,
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P54_DECRYPT_NOKEY,
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P54_DECRYPT_NOMICHAEL,
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P54_DECRYPT_NOCKIPMIC,
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P54_DECRYPT_FAIL_WEP,
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P54_DECRYPT_FAIL_TKIP,
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P54_DECRYPT_FAIL_MICHAEL,
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P54_DECRYPT_FAIL_CKIPKP,
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P54_DECRYPT_FAIL_CKIPMIC,
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P54_DECRYPT_FAIL_AESCCMP
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};
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struct p54_rx_data {
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__le16 flags;
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__le16 len;
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__le16 freq;
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u8 antenna;
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u8 rate;
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u8 rssi;
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u8 quality;
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u8 decrypt_status;
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u8 rssi_raw;
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__le32 tsf32;
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__le32 unalloc0;
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u8 align[0];
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} __attribute__ ((packed));
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enum p54_trap_type {
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P54_TRAP_SCAN = 0,
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P54_TRAP_TIMER,
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P54_TRAP_BEACON_TX,
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P54_TRAP_FAA_RADIO_ON,
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P54_TRAP_FAA_RADIO_OFF,
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P54_TRAP_RADAR,
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P54_TRAP_NO_BEACON,
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P54_TRAP_TBTT,
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P54_TRAP_SCO_ENTER,
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P54_TRAP_SCO_EXIT
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};
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struct p54_trap {
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__le16 event;
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__le16 frequency;
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} __attribute__ ((packed));
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enum p54_frame_sent_status {
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P54_TX_OK = 0,
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P54_TX_FAILED,
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P54_TX_PSM,
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P54_TX_PSM_CANCELLED = 4
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};
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struct p54_frame_sent {
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u8 status;
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u8 tries;
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u8 ack_rssi;
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u8 quality;
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__le16 seq;
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u8 antenna;
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u8 padding;
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} __attribute__ ((packed));
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enum p54_tx_data_crypt {
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P54_CRYPTO_NONE = 0,
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P54_CRYPTO_WEP,
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P54_CRYPTO_TKIP,
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P54_CRYPTO_TKIPMICHAEL,
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P54_CRYPTO_CCX_WEPMIC,
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P54_CRYPTO_CCX_KPMIC,
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P54_CRYPTO_CCX_KP,
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P54_CRYPTO_AESCCMP
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};
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enum p54_tx_data_queue {
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P54_QUEUE_BEACON = 0,
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P54_QUEUE_FWSCAN = 1,
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P54_QUEUE_MGMT = 2,
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P54_QUEUE_CAB = 3,
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P54_QUEUE_DATA = 4,
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P54_QUEUE_AC_NUM = 4,
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P54_QUEUE_AC_VO = 4,
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P54_QUEUE_AC_VI = 5,
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P54_QUEUE_AC_BE = 6,
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P54_QUEUE_AC_BK = 7,
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/* keep last */
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P54_QUEUE_NUM = 8,
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};
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struct p54_tx_data {
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u8 rateset[8];
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u8 rts_rate_idx;
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u8 crypt_offset;
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u8 key_type;
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u8 key_len;
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u8 key[16];
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u8 hw_queue;
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u8 backlog;
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__le16 durations[4];
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u8 tx_antenna;
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union {
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struct {
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u8 cts_rate;
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__le16 output_power;
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} __attribute__((packed)) longbow;
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struct {
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u8 output_power;
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u8 cts_rate;
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u8 unalloc;
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} __attribute__ ((packed)) normal;
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} __attribute__ ((packed));
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u8 unalloc2[2];
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u8 align[0];
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} __attribute__ ((packed));
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/* unit is ms */
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#define P54_TX_FRAME_LIFETIME 2000
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#define P54_TX_TIMEOUT 4000
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#define P54_STATISTICS_UPDATE 5000
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#define P54_FILTER_TYPE_NONE 0
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#define P54_FILTER_TYPE_STATION BIT(0)
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#define P54_FILTER_TYPE_IBSS BIT(1)
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#define P54_FILTER_TYPE_AP BIT(2)
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#define P54_FILTER_TYPE_TRANSPARENT BIT(3)
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#define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
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#define P54_FILTER_TYPE_HIBERNATE BIT(5)
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#define P54_FILTER_TYPE_NOACK BIT(6)
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#define P54_FILTER_TYPE_RX_DISABLED BIT(7)
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struct p54_setup_mac {
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__le16 mac_mode;
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u8 mac_addr[ETH_ALEN];
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u8 bssid[ETH_ALEN];
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u8 rx_antenna;
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u8 rx_align;
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union {
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struct {
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__le32 basic_rate_mask;
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u8 rts_rates[8];
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__le32 rx_addr;
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__le16 max_rx;
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__le16 rxhw;
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__le16 wakeup_timer;
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__le16 unalloc0;
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} v1 __attribute__ ((packed));
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struct {
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__le32 rx_addr;
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__le16 max_rx;
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__le16 rxhw;
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__le16 timer;
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__le16 truncate;
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__le32 basic_rate_mask;
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u8 sbss_offset;
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u8 mcast_window;
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u8 rx_rssi_threshold;
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u8 rx_ed_threshold;
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__le32 ref_clock;
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__le16 lpf_bandwidth;
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__le16 osc_start_delay;
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} v2 __attribute__ ((packed));
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} __attribute__ ((packed));
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} __attribute__ ((packed));
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#define P54_SETUP_V1_LEN 40
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#define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
|
|
|
|
#define P54_SCAN_EXIT BIT(0)
|
|
#define P54_SCAN_TRAP BIT(1)
|
|
#define P54_SCAN_ACTIVE BIT(2)
|
|
#define P54_SCAN_FILTER BIT(3)
|
|
|
|
struct p54_scan_head {
|
|
__le16 mode;
|
|
__le16 dwell;
|
|
u8 scan_params[20];
|
|
__le16 freq;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_scan_body {
|
|
u8 pa_points_per_curve;
|
|
u8 val_barker;
|
|
u8 val_bpsk;
|
|
u8 val_qpsk;
|
|
u8 val_16qam;
|
|
u8 val_64qam;
|
|
struct p54_pa_curve_data_sample curve_data[8];
|
|
u8 dup_bpsk;
|
|
u8 dup_qpsk;
|
|
u8 dup_16qam;
|
|
u8 dup_64qam;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_scan_body_longbow {
|
|
struct p54_channel_output_limit_longbow power_limits;
|
|
struct p54_pa_curve_data_sample_longbow curve_data[8];
|
|
__le16 unkn[6]; /* maybe more power_limits or rate_mask */
|
|
} __attribute__ ((packed));
|
|
|
|
union p54_scan_body_union {
|
|
struct p54_scan_body normal;
|
|
struct p54_scan_body_longbow longbow;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_scan_tail_rate {
|
|
__le32 basic_rate_mask;
|
|
u8 rts_rates[8];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_led {
|
|
__le16 flags;
|
|
__le16 mask[2];
|
|
__le16 delay[2];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_edcf {
|
|
u8 flags;
|
|
u8 slottime;
|
|
u8 sifs;
|
|
u8 eofpad;
|
|
struct p54_edcf_queue_param queue[8];
|
|
u8 mapping[4];
|
|
__le16 frameburst;
|
|
__le16 round_trip_delay;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_statistics {
|
|
__le32 rx_success;
|
|
__le32 rx_bad_fcs;
|
|
__le32 rx_abort;
|
|
__le32 rx_abort_phy;
|
|
__le32 rts_success;
|
|
__le32 rts_fail;
|
|
__le32 tsf32;
|
|
__le32 airtime;
|
|
__le32 noise;
|
|
__le32 sample_noise[8];
|
|
__le32 sample_cca;
|
|
__le32 sample_tx;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_xbow_synth {
|
|
__le16 magic1;
|
|
__le16 magic2;
|
|
__le16 freq;
|
|
u32 padding[5];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_timer {
|
|
__le32 interval;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_keycache {
|
|
u8 entry;
|
|
u8 key_id;
|
|
u8 mac[ETH_ALEN];
|
|
u8 padding[2];
|
|
u8 key_type;
|
|
u8 key_len;
|
|
u8 key[24];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_burst {
|
|
u8 flags;
|
|
u8 queue;
|
|
u8 backlog;
|
|
u8 pad;
|
|
__le16 durations[32];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_psm_interval {
|
|
__le16 interval;
|
|
__le16 periods;
|
|
} __attribute__ ((packed));
|
|
|
|
#define P54_PSM_CAM 0
|
|
#define P54_PSM BIT(0)
|
|
#define P54_PSM_DTIM BIT(1)
|
|
#define P54_PSM_MCBC BIT(2)
|
|
#define P54_PSM_CHECKSUM BIT(3)
|
|
#define P54_PSM_SKIP_MORE_DATA BIT(4)
|
|
#define P54_PSM_BEACON_TIMEOUT BIT(5)
|
|
#define P54_PSM_HFOSLEEP BIT(6)
|
|
#define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
|
|
#define P54_PSM_LPIT BIT(8)
|
|
#define P54_PSM_BF_UCAST_SKIP BIT(9)
|
|
#define P54_PSM_BF_MCAST_SKIP BIT(10)
|
|
|
|
struct p54_psm {
|
|
__le16 mode;
|
|
__le16 aid;
|
|
struct p54_psm_interval intervals[4];
|
|
u8 beacon_rssi_skip_max;
|
|
u8 rssi_delta_threshold;
|
|
u8 nr;
|
|
u8 exclude[1];
|
|
} __attribute__ ((packed));
|
|
|
|
#define MC_FILTER_ADDRESS_NUM 4
|
|
|
|
struct p54_group_address_table {
|
|
__le16 filter_enable;
|
|
__le16 num_address;
|
|
u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_txcancel {
|
|
__le32 req_id;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_sta_unlock {
|
|
u8 addr[ETH_ALEN];
|
|
u16 padding;
|
|
} __attribute__ ((packed));
|
|
|
|
#define P54_TIM_CLEAR BIT(15)
|
|
struct p54_tim {
|
|
u8 count;
|
|
u8 padding[3];
|
|
__le16 entry[8];
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_cce_quiet {
|
|
__le32 period;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_bt_balancer {
|
|
__le16 prio_thresh;
|
|
__le16 acl_thresh;
|
|
} __attribute__ ((packed));
|
|
|
|
struct p54_arp_table {
|
|
__le16 filter_enable;
|
|
u8 ipv4_addr[4];
|
|
} __attribute__ ((packed));
|
|
|
|
#endif /* P54COMMON_H */
|