mirror of https://gitee.com/openkylin/linux.git
ef21f683a0
Use the LBR to fix up the PEBS IP+1 issue. As said, PEBS reports the next instruction, here we use the LBR to find the last branch and from that construct the actual IP. If the IP matches the LBR-TO, we use LBR-FROM, otherwise we use the LBR-TO address as the beginning of the last basic block and decode forward. Once we find a match to the current IP, we use the previous location. This patch introduces a new ABI element: PERF_RECORD_MISC_EXACT, which conveys that the reported IP (PERF_SAMPLE_IP) is the exact instruction that caused the event (barring CPU errata). The fixup can fail due to various reasons: 1) LBR contains invalid data (quite possible) 2) part of the basic block got paged out 3) the reported IP isn't part of the basic block (see 1) Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: Masami Hiramatsu <mhiramat@redhat.com> Cc: "Zhang, Yanmin" <yanmin_zhang@linux.intel.com> Cc: paulus@samba.org Cc: eranian@google.com Cc: robert.richter@amd.com Cc: fweisbec@gmail.com LKML-Reference: <20100304140100.619375431@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu> |
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| .. | ||
| cpufreq | ||
| mcheck | ||
| mtrr | ||
| .gitignore | ||
| Makefile | ||
| addon_cpuid_features.c | ||
| amd.c | ||
| bugs.c | ||
| bugs_64.c | ||
| centaur.c | ||
| cmpxchg.c | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| hypervisor.c | ||
| intel.c | ||
| intel_cacheinfo.c | ||
| mkcapflags.pl | ||
| perf_event.c | ||
| perf_event_amd.c | ||
| perf_event_intel.c | ||
| perf_event_intel_ds.c | ||
| perf_event_intel_lbr.c | ||
| perf_event_p6.c | ||
| perfctr-watchdog.c | ||
| powerflags.c | ||
| proc.c | ||
| sched.c | ||
| transmeta.c | ||
| umc.c | ||
| vmware.c | ||