mirror of https://gitee.com/openkylin/linux.git
263 lines
7.0 KiB
C
263 lines
7.0 KiB
C
/*
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* Copyright (c) 2015 Endless Mobile, Inc.
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* Author: Carlo Caione <carlo@endlessm.com>
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*
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* Copyright (c) 2018 Baylibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* In the most basic form, a Meson PLL is composed as follows:
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*
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* PLL
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* +------------------------------+
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* | |
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* in -----[ /N ]---[ *M ]---[ >>OD ]----->> out
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* | ^ ^ |
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* +------------------------------+
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* | |
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* FREF VCO
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*
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* out = in * (m + frac / frac_max) / (n << sum(ods))
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*/
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/math64.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include "clkc.h"
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static inline struct meson_clk_pll_data *
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meson_clk_pll_data(struct clk_regmap *clk)
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{
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return (struct meson_clk_pll_data *)clk->data;
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}
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static unsigned long __pll_params_to_rate(unsigned long parent_rate,
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const struct pll_rate_table *pllt,
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u16 frac,
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struct meson_clk_pll_data *pll)
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{
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u64 rate = (u64)parent_rate * pllt->m;
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unsigned int od = pllt->od + pllt->od2 + pllt->od3;
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if (frac && MESON_PARM_APPLICABLE(&pll->frac)) {
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u64 frac_rate = (u64)parent_rate * frac;
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rate += DIV_ROUND_UP_ULL(frac_rate,
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(1 << pll->frac.width));
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}
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return DIV_ROUND_UP_ULL(rate, pllt->n << od);
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}
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static unsigned long meson_clk_pll_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_regmap *clk = to_clk_regmap(hw);
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struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
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struct pll_rate_table pllt;
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u16 frac;
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pllt.n = meson_parm_read(clk->map, &pll->n);
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pllt.m = meson_parm_read(clk->map, &pll->m);
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pllt.od = meson_parm_read(clk->map, &pll->od);
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pllt.od2 = MESON_PARM_APPLICABLE(&pll->od2) ?
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meson_parm_read(clk->map, &pll->od2) :
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0;
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pllt.od3 = MESON_PARM_APPLICABLE(&pll->od3) ?
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meson_parm_read(clk->map, &pll->od3) :
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0;
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frac = MESON_PARM_APPLICABLE(&pll->frac) ?
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meson_parm_read(clk->map, &pll->frac) :
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0;
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return __pll_params_to_rate(parent_rate, &pllt, frac, pll);
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}
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static u16 __pll_params_with_frac(unsigned long rate,
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unsigned long parent_rate,
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const struct pll_rate_table *pllt,
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struct meson_clk_pll_data *pll)
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{
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u16 frac_max = (1 << pll->frac.width);
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u64 val = (u64)rate * pllt->n;
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val <<= pllt->od + pllt->od2 + pllt->od3;
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if (pll->flags & CLK_MESON_PLL_ROUND_CLOSEST)
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val = DIV_ROUND_CLOSEST_ULL(val * frac_max, parent_rate);
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else
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val = div_u64(val * frac_max, parent_rate);
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val -= pllt->m * frac_max;
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return min((u16)val, (u16)(frac_max - 1));
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}
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static const struct pll_rate_table *
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meson_clk_get_pll_settings(unsigned long rate,
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struct meson_clk_pll_data *pll)
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{
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const struct pll_rate_table *table = pll->table;
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unsigned int i = 0;
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if (!table)
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return NULL;
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/* Find the first table element exceeding rate */
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while (table[i].rate && table[i].rate <= rate)
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i++;
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if (i != 0) {
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if (MESON_PARM_APPLICABLE(&pll->frac) ||
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!(pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) ||
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(abs(rate - table[i - 1].rate) <
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abs(rate - table[i].rate)))
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i--;
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}
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return (struct pll_rate_table *)&table[i];
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}
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static long meson_clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct clk_regmap *clk = to_clk_regmap(hw);
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struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
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const struct pll_rate_table *pllt =
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meson_clk_get_pll_settings(rate, pll);
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u16 frac;
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if (!pllt)
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return meson_clk_pll_recalc_rate(hw, *parent_rate);
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if (!MESON_PARM_APPLICABLE(&pll->frac)
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|| rate == pllt->rate)
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return pllt->rate;
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/*
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* The rate provided by the setting is not an exact match, let's
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* try to improve the result using the fractional parameter
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*/
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frac = __pll_params_with_frac(rate, *parent_rate, pllt, pll);
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return __pll_params_to_rate(*parent_rate, pllt, frac, pll);
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}
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static int meson_clk_pll_wait_lock(struct clk_hw *hw)
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{
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struct clk_regmap *clk = to_clk_regmap(hw);
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struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
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int delay = 24000000;
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do {
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/* Is the clock locked now ? */
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if (meson_parm_read(clk->map, &pll->l))
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return 0;
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delay--;
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} while (delay > 0);
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return -ETIMEDOUT;
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}
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static void meson_clk_pll_init(struct clk_hw *hw)
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{
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struct clk_regmap *clk = to_clk_regmap(hw);
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struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
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if (pll->init_count) {
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meson_parm_write(clk->map, &pll->rst, 1);
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regmap_multi_reg_write(clk->map, pll->init_regs,
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pll->init_count);
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meson_parm_write(clk->map, &pll->rst, 0);
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}
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}
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static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_regmap *clk = to_clk_regmap(hw);
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struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
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const struct pll_rate_table *pllt;
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unsigned long old_rate;
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u16 frac = 0;
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if (parent_rate == 0 || rate == 0)
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return -EINVAL;
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old_rate = rate;
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pllt = meson_clk_get_pll_settings(rate, pll);
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if (!pllt)
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return -EINVAL;
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/* Put the pll in reset to write the params */
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meson_parm_write(clk->map, &pll->rst, 1);
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meson_parm_write(clk->map, &pll->n, pllt->n);
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meson_parm_write(clk->map, &pll->m, pllt->m);
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meson_parm_write(clk->map, &pll->od, pllt->od);
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if (MESON_PARM_APPLICABLE(&pll->od2))
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meson_parm_write(clk->map, &pll->od2, pllt->od2);
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if (MESON_PARM_APPLICABLE(&pll->od3))
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meson_parm_write(clk->map, &pll->od3, pllt->od3);
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if (MESON_PARM_APPLICABLE(&pll->frac)) {
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frac = __pll_params_with_frac(rate, parent_rate, pllt, pll);
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meson_parm_write(clk->map, &pll->frac, frac);
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}
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/* make sure the reset is cleared at this point */
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meson_parm_write(clk->map, &pll->rst, 0);
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if (meson_clk_pll_wait_lock(hw)) {
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pr_warn("%s: pll did not lock, trying to restore old rate %lu\n",
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__func__, old_rate);
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/*
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* FIXME: Do we really need/want this HACK ?
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* It looks unsafe. what happens if the clock gets into a
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* broken state and we can't lock back on the old_rate ? Looks
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* like an infinite recursion is possible
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*/
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meson_clk_pll_set_rate(hw, old_rate, parent_rate);
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}
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return 0;
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}
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const struct clk_ops meson_clk_pll_ops = {
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.init = meson_clk_pll_init,
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.recalc_rate = meson_clk_pll_recalc_rate,
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.round_rate = meson_clk_pll_round_rate,
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.set_rate = meson_clk_pll_set_rate,
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};
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const struct clk_ops meson_clk_pll_ro_ops = {
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.recalc_rate = meson_clk_pll_recalc_rate,
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};
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