mirror of https://gitee.com/openkylin/linux.git
372 lines
11 KiB
C
372 lines
11 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
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* Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_PGTABLE_64_H
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#define _ASM_PGTABLE_64_H
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#include <linux/compiler.h>
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#include <linux/linkage.h>
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#include <asm/addrspace.h>
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#include <asm/page.h>
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#include <asm/cachectl.h>
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#include <asm/fixmap.h>
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#define __ARCH_USE_5LEVEL_HACK
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#if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_VA_BITS_48)
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#include <asm-generic/pgtable-nopmd.h>
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#elif !(defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS_VA_BITS_48))
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#include <asm-generic/pgtable-nopud.h>
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#endif
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/*
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* Each address space has 2 4K pages as its page directory, giving 1024
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* (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
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* single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
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* tables. Each page table is also a single 4K page, giving 512 (==
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* PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
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* invalid_pmd_table, each pmd entry is initialized to point to
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* invalid_pte_table, each pte is initialized to 0.
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*
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* Kernel mappings: kernel mappings are held in the swapper_pg_table.
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* The layout is identical to userspace except it's indexed with the
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* fault address - VMALLOC_START.
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*/
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/* PGDIR_SHIFT determines what a third-level page table entry can map */
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#ifdef __PAGETABLE_PMD_FOLDED
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#define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT + PTE_ORDER - 3)
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#else
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/* PMD_SHIFT determines the size of the area a second-level page table can map */
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#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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# ifdef __PAGETABLE_PUD_FOLDED
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# define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
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# endif
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#endif
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#ifndef __PAGETABLE_PUD_FOLDED
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#define PUD_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
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#define PUD_SIZE (1UL << PUD_SHIFT)
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#define PUD_MASK (~(PUD_SIZE-1))
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#define PGDIR_SHIFT (PUD_SHIFT + (PAGE_SHIFT + PUD_ORDER - 3))
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#endif
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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/*
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* For 4kB page size we use a 3 level page tree and an 8kB pud, which
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* permits us mapping 40 bits of virtual address space.
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*
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* We used to implement 41 bits by having an order 1 pmd level but that seemed
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* rather pointless.
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*
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* For 8kB page size we use a 3 level page tree which permits a total of
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* 8TB of address space. Alternatively a 33-bit / 8GB organization using
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* two levels would be easy to implement.
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*
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* For 16kB page size we use a 2 level page tree which permits a total of
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* 36 bits of virtual address space. We could add a third level but it seems
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* like at the moment there's no need for this.
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*
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* For 64kB page size we use a 2 level page table tree for a total of 42 bits
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* of virtual address space.
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*/
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#ifdef CONFIG_PAGE_SIZE_4KB
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# ifdef CONFIG_MIPS_VA_BITS_48
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# define PGD_ORDER 0
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# define PUD_ORDER 0
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# else
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# define PGD_ORDER 1
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# define PUD_ORDER aieeee_attempt_to_allocate_pud
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# endif
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#define PMD_ORDER 0
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#define PTE_ORDER 0
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#endif
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#ifdef CONFIG_PAGE_SIZE_8KB
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#define PGD_ORDER 0
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#define PUD_ORDER aieeee_attempt_to_allocate_pud
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#define PMD_ORDER 0
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#define PTE_ORDER 0
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#endif
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#ifdef CONFIG_PAGE_SIZE_16KB
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#ifdef CONFIG_MIPS_VA_BITS_48
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#define PGD_ORDER 1
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#else
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#define PGD_ORDER 0
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#endif
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#define PUD_ORDER aieeee_attempt_to_allocate_pud
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#define PMD_ORDER 0
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#define PTE_ORDER 0
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#endif
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#ifdef CONFIG_PAGE_SIZE_32KB
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#define PGD_ORDER 0
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#define PUD_ORDER aieeee_attempt_to_allocate_pud
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#define PMD_ORDER 0
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#define PTE_ORDER 0
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#endif
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#ifdef CONFIG_PAGE_SIZE_64KB
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#define PGD_ORDER 0
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#define PUD_ORDER aieeee_attempt_to_allocate_pud
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#ifdef CONFIG_MIPS_VA_BITS_48
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#define PMD_ORDER 0
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#else
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#define PMD_ORDER aieeee_attempt_to_allocate_pmd
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#endif
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#define PTE_ORDER 0
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#endif
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#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
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#ifndef __PAGETABLE_PUD_FOLDED
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#define PTRS_PER_PUD ((PAGE_SIZE << PUD_ORDER) / sizeof(pud_t))
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#endif
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#ifndef __PAGETABLE_PMD_FOLDED
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#define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
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#endif
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#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
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#define USER_PTRS_PER_PGD ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
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#define FIRST_USER_ADDRESS 0UL
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/*
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* TLB refill handlers also map the vmalloc area into xuseg. Avoid
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* the first couple of pages so NULL pointer dereferences will still
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* reliably trap.
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*/
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#define VMALLOC_START (MAP_BASE + (2 * PAGE_SIZE))
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#define VMALLOC_END \
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(MAP_BASE + \
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min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
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(1UL << cpu_vmbits)) - (1UL << 32))
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#if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
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VMALLOC_START != CKSSEG
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/* Load modules into 32bit-compatible segment. */
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#define MODULE_START CKSSEG
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#define MODULE_END (FIXADDR_START-2*PAGE_SIZE)
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#endif
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#define pte_ERROR(e) \
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printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
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#ifndef __PAGETABLE_PMD_FOLDED
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#define pmd_ERROR(e) \
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printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
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#endif
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#ifndef __PAGETABLE_PUD_FOLDED
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#define pud_ERROR(e) \
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printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
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#endif
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#define pgd_ERROR(e) \
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printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
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extern pte_t invalid_pte_table[PTRS_PER_PTE];
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#ifndef __PAGETABLE_PUD_FOLDED
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/*
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* For 4-level pagetables we defines these ourselves, for 3-level the
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* definitions are below, for 2-level the
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* definitions are supplied by <asm-generic/pgtable-nopmd.h>.
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*/
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typedef struct { unsigned long pud; } pud_t;
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#define pud_val(x) ((x).pud)
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#define __pud(x) ((pud_t) { (x) })
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extern pud_t invalid_pud_table[PTRS_PER_PUD];
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/*
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* Empty pgd entries point to the invalid_pud_table.
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*/
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static inline int pgd_none(pgd_t pgd)
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{
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return pgd_val(pgd) == (unsigned long)invalid_pud_table;
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}
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static inline int pgd_bad(pgd_t pgd)
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{
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if (unlikely(pgd_val(pgd) & ~PAGE_MASK))
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return 1;
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return 0;
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}
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static inline int pgd_present(pgd_t pgd)
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{
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return pgd_val(pgd) != (unsigned long)invalid_pud_table;
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}
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static inline void pgd_clear(pgd_t *pgdp)
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{
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pgd_val(*pgdp) = (unsigned long)invalid_pud_table;
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}
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#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
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static inline unsigned long pgd_page_vaddr(pgd_t pgd)
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{
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return pgd_val(pgd);
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}
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static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
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{
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return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
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}
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static inline void set_pgd(pgd_t *pgd, pgd_t pgdval)
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{
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*pgd = pgdval;
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}
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#endif
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#ifndef __PAGETABLE_PMD_FOLDED
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/*
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* For 3-level pagetables we defines these ourselves, for 2-level the
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* definitions are supplied by <asm-generic/pgtable-nopmd.h>.
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*/
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typedef struct { unsigned long pmd; } pmd_t;
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#define pmd_val(x) ((x).pmd)
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#define __pmd(x) ((pmd_t) { (x) } )
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extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
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#endif
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/*
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* Empty pgd/pmd entries point to the invalid_pte_table.
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*/
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static inline int pmd_none(pmd_t pmd)
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{
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return pmd_val(pmd) == (unsigned long) invalid_pte_table;
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}
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static inline int pmd_bad(pmd_t pmd)
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{
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#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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/* pmd_huge(pmd) but inline */
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if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
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return 0;
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#endif
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if (unlikely(pmd_val(pmd) & ~PAGE_MASK))
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return 1;
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return 0;
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}
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static inline int pmd_present(pmd_t pmd)
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{
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return pmd_val(pmd) != (unsigned long) invalid_pte_table;
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}
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static inline void pmd_clear(pmd_t *pmdp)
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{
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pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
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}
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#ifndef __PAGETABLE_PMD_FOLDED
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/*
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* Empty pud entries point to the invalid_pmd_table.
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*/
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static inline int pud_none(pud_t pud)
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{
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return pud_val(pud) == (unsigned long) invalid_pmd_table;
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}
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static inline int pud_bad(pud_t pud)
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{
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return pud_val(pud) & ~PAGE_MASK;
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}
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static inline int pud_present(pud_t pud)
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{
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return pud_val(pud) != (unsigned long) invalid_pmd_table;
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}
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static inline void pud_clear(pud_t *pudp)
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{
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pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
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}
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#endif
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#ifdef CONFIG_CPU_VR41XX
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#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
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#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
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#else
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#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))
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#define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
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#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
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#endif
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#define __pgd_offset(address) pgd_index(address)
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#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
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#define __pmd_offset(address) pmd_index(address)
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/* to find an entry in a kernel page-table-directory */
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
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#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
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/* to find an entry in a page-table-directory */
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#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
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#ifndef __PAGETABLE_PMD_FOLDED
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static inline unsigned long pud_page_vaddr(pud_t pud)
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{
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return pud_val(pud);
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}
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#define pud_phys(pud) virt_to_phys((void *)pud_val(pud))
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#define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
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/* Find an entry in the second-level page table.. */
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static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
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{
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return (pmd_t *) pud_page_vaddr(*pud) + pmd_index(address);
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}
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#endif
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/* Find an entry in the third-level page table.. */
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#define __pte_offset(address) \
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(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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#define pte_offset(dir, address) \
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((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
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#define pte_offset_kernel(dir, address) \
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((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
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#define pte_offset_map(dir, address) \
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((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
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#define pte_unmap(pte) ((void)(pte))
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/*
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* Initialize a new pgd / pmd table with invalid pointers.
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*/
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extern void pgd_init(unsigned long page);
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extern void pud_init(unsigned long page, unsigned long pagetable);
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extern void pmd_init(unsigned long page, unsigned long pagetable);
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/*
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* Non-present pages: high 40 bits are offset, next 8 bits type,
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* low 16 bits zero.
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*/
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static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
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{ pte_t pte; pte_val(pte) = (type << 16) | (offset << 24); return pte; }
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#define __swp_type(x) (((x).val >> 16) & 0xff)
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#define __swp_offset(x) ((x).val >> 24)
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#define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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#endif /* _ASM_PGTABLE_64_H */
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