Paul Burton 5ec17af7ea MIPS: Boston: Disable EG20T prefetch ... The Intel EG20T Platform Controller Hub used on the MIPS Boston development board supports prefetching memory to optimize DMA transfers. Unfortunately for unknown reasons this doesn't work well with some MIPS CPUs such as the P6600, particularly when using an I/O Coherence Unit (IOCU) to provide cache-coherent DMA. In these systems it is common for DMA data to be lost, resulting in broken access to EG20T devices such as the MMC or SATA controllers. Support for a DT property to configure the prefetching was added a while back by commit 549ce8f134 ("misc: pch_phub: Read prefetch value from device tree if passed") but we never added the DT snippet to make use of it. Add that now in order to disable the prefetching & fix DMA on the affected systems. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21068/ Cc: linux-mips@linux-mips.org		2018-11-09 17:20:17 -08:00
..
Makefile	kbuild: remove all dummy assignments to obj-	2017-11-18 11:46:06 +09:00
boston.dts	MIPS: Boston: Disable EG20T prefetch	2018-11-09 17:20:17 -08:00
pistachio.dtsi	MIPS: DTS: Remove num-slots from Pistachio SoC	2017-11-08 22:18:54 +00:00
pistachio_marduk.dts	MIPS: DTS: img: add device tree for Marduk board	2017-01-03 16:34:41 +01:00