mirror of https://gitee.com/openkylin/linux.git
551 lines
13 KiB
C
551 lines
13 KiB
C
/*
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* Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/slab.h>
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#include <rdma/ib_user_verbs.h>
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#include "mlx4_ib.h"
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static u32 convert_access(int acc)
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{
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return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC : 0) |
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(acc & IB_ACCESS_REMOTE_WRITE ? MLX4_PERM_REMOTE_WRITE : 0) |
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(acc & IB_ACCESS_REMOTE_READ ? MLX4_PERM_REMOTE_READ : 0) |
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(acc & IB_ACCESS_LOCAL_WRITE ? MLX4_PERM_LOCAL_WRITE : 0) |
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(acc & IB_ACCESS_MW_BIND ? MLX4_PERM_BIND_MW : 0) |
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MLX4_PERM_LOCAL_READ;
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}
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static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type)
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{
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switch (type) {
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case IB_MW_TYPE_1: return MLX4_MW_TYPE_1;
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case IB_MW_TYPE_2: return MLX4_MW_TYPE_2;
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default: return -1;
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}
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}
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struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc)
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{
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struct mlx4_ib_mr *mr;
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int err;
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr)
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return ERR_PTR(-ENOMEM);
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err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0,
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~0ull, convert_access(acc), 0, 0, &mr->mmr);
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if (err)
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goto err_free;
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err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr);
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if (err)
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goto err_mr;
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mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
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mr->umem = NULL;
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return &mr->ibmr;
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err_mr:
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(void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
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err_free:
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kfree(mr);
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return ERR_PTR(err);
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}
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int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
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struct ib_umem *umem)
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{
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u64 *pages;
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int i, k, entry;
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int n;
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int len;
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int err = 0;
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struct scatterlist *sg;
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pages = (u64 *) __get_free_page(GFP_KERNEL);
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if (!pages)
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return -ENOMEM;
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i = n = 0;
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for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
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len = sg_dma_len(sg) >> mtt->page_shift;
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for (k = 0; k < len; ++k) {
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pages[i++] = sg_dma_address(sg) +
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umem->page_size * k;
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/*
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* Be friendly to mlx4_write_mtt() and
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* pass it chunks of appropriate size.
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*/
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if (i == PAGE_SIZE / sizeof (u64)) {
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err = mlx4_write_mtt(dev->dev, mtt, n,
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i, pages);
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if (err)
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goto out;
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n += i;
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i = 0;
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}
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}
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}
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if (i)
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err = mlx4_write_mtt(dev->dev, mtt, n, i, pages);
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out:
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free_page((unsigned long) pages);
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return err;
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}
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struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
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u64 virt_addr, int access_flags,
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struct ib_udata *udata)
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{
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struct mlx4_ib_dev *dev = to_mdev(pd->device);
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struct mlx4_ib_mr *mr;
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int shift;
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int err;
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int n;
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr)
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return ERR_PTR(-ENOMEM);
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/* Force registering the memory as writable. */
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/* Used for memory re-registeration. HCA protects the access */
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mr->umem = ib_umem_get(pd->uobject->context, start, length,
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access_flags | IB_ACCESS_LOCAL_WRITE, 0);
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if (IS_ERR(mr->umem)) {
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err = PTR_ERR(mr->umem);
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goto err_free;
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}
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n = ib_umem_page_count(mr->umem);
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shift = ilog2(mr->umem->page_size);
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err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length,
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convert_access(access_flags), n, shift, &mr->mmr);
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if (err)
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goto err_umem;
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err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem);
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if (err)
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goto err_mr;
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err = mlx4_mr_enable(dev->dev, &mr->mmr);
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if (err)
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goto err_mr;
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mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
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return &mr->ibmr;
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err_mr:
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(void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
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err_umem:
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ib_umem_release(mr->umem);
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err_free:
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kfree(mr);
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return ERR_PTR(err);
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}
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int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
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u64 start, u64 length, u64 virt_addr,
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int mr_access_flags, struct ib_pd *pd,
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struct ib_udata *udata)
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{
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struct mlx4_ib_dev *dev = to_mdev(mr->device);
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struct mlx4_ib_mr *mmr = to_mmr(mr);
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struct mlx4_mpt_entry *mpt_entry;
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struct mlx4_mpt_entry **pmpt_entry = &mpt_entry;
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int err;
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/* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs,
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* we assume that the calls can't run concurrently. Otherwise, a
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* race exists.
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*/
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err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);
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if (err)
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return err;
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if (flags & IB_MR_REREG_PD) {
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err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,
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to_mpd(pd)->pdn);
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if (err)
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goto release_mpt_entry;
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}
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if (flags & IB_MR_REREG_ACCESS) {
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err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
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convert_access(mr_access_flags));
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if (err)
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goto release_mpt_entry;
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}
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if (flags & IB_MR_REREG_TRANS) {
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int shift;
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int n;
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mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
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ib_umem_release(mmr->umem);
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mmr->umem = ib_umem_get(mr->uobject->context, start, length,
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mr_access_flags |
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IB_ACCESS_LOCAL_WRITE,
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0);
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if (IS_ERR(mmr->umem)) {
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err = PTR_ERR(mmr->umem);
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/* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */
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mmr->umem = NULL;
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goto release_mpt_entry;
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}
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n = ib_umem_page_count(mmr->umem);
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shift = ilog2(mmr->umem->page_size);
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err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr,
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virt_addr, length, n, shift,
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*pmpt_entry);
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if (err) {
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ib_umem_release(mmr->umem);
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goto release_mpt_entry;
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}
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mmr->mmr.iova = virt_addr;
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mmr->mmr.size = length;
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err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem);
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if (err) {
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mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
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ib_umem_release(mmr->umem);
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goto release_mpt_entry;
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}
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}
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/* If we couldn't transfer the MR to the HCA, just remember to
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* return a failure. But dereg_mr will free the resources.
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*/
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err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry);
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if (!err && flags & IB_MR_REREG_ACCESS)
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mmr->mmr.access = mr_access_flags;
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release_mpt_entry:
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mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);
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return err;
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}
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static int
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mlx4_alloc_priv_pages(struct ib_device *device,
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struct mlx4_ib_mr *mr,
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int max_pages)
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{
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int ret;
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/* Ensure that size is aligned to DMA cacheline
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* requirements.
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* max_pages is limited to MLX4_MAX_FAST_REG_PAGES
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* so page_map_size will never cross PAGE_SIZE.
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*/
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mr->page_map_size = roundup(max_pages * sizeof(u64),
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MLX4_MR_PAGES_ALIGN);
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/* Prevent cross page boundary allocation. */
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mr->pages = (__be64 *)get_zeroed_page(GFP_KERNEL);
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if (!mr->pages)
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return -ENOMEM;
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mr->page_map = dma_map_single(device->dma_device, mr->pages,
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mr->page_map_size, DMA_TO_DEVICE);
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if (dma_mapping_error(device->dma_device, mr->page_map)) {
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ret = -ENOMEM;
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goto err;
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}
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return 0;
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err:
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free_page((unsigned long)mr->pages);
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return ret;
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}
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static void
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mlx4_free_priv_pages(struct mlx4_ib_mr *mr)
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{
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if (mr->pages) {
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struct ib_device *device = mr->ibmr.device;
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dma_unmap_single(device->dma_device, mr->page_map,
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mr->page_map_size, DMA_TO_DEVICE);
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free_page((unsigned long)mr->pages);
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mr->pages = NULL;
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}
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}
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int mlx4_ib_dereg_mr(struct ib_mr *ibmr)
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{
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struct mlx4_ib_mr *mr = to_mmr(ibmr);
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int ret;
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mlx4_free_priv_pages(mr);
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ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr);
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if (ret)
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return ret;
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if (mr->umem)
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ib_umem_release(mr->umem);
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kfree(mr);
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return 0;
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}
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struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
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struct ib_udata *udata)
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{
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struct mlx4_ib_dev *dev = to_mdev(pd->device);
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struct mlx4_ib_mw *mw;
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int err;
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mw = kmalloc(sizeof(*mw), GFP_KERNEL);
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if (!mw)
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return ERR_PTR(-ENOMEM);
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err = mlx4_mw_alloc(dev->dev, to_mpd(pd)->pdn,
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to_mlx4_type(type), &mw->mmw);
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if (err)
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goto err_free;
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err = mlx4_mw_enable(dev->dev, &mw->mmw);
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if (err)
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goto err_mw;
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mw->ibmw.rkey = mw->mmw.key;
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return &mw->ibmw;
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err_mw:
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mlx4_mw_free(dev->dev, &mw->mmw);
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err_free:
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kfree(mw);
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return ERR_PTR(err);
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}
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int mlx4_ib_dealloc_mw(struct ib_mw *ibmw)
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{
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struct mlx4_ib_mw *mw = to_mmw(ibmw);
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mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw);
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kfree(mw);
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return 0;
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}
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struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
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enum ib_mr_type mr_type,
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u32 max_num_sg)
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{
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struct mlx4_ib_dev *dev = to_mdev(pd->device);
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struct mlx4_ib_mr *mr;
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int err;
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if (mr_type != IB_MR_TYPE_MEM_REG ||
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max_num_sg > MLX4_MAX_FAST_REG_PAGES)
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return ERR_PTR(-EINVAL);
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr)
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return ERR_PTR(-ENOMEM);
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err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0,
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max_num_sg, 0, &mr->mmr);
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if (err)
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goto err_free;
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err = mlx4_alloc_priv_pages(pd->device, mr, max_num_sg);
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if (err)
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goto err_free_mr;
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mr->max_pages = max_num_sg;
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err = mlx4_mr_enable(dev->dev, &mr->mmr);
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if (err)
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goto err_free_pl;
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mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
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mr->umem = NULL;
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return &mr->ibmr;
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err_free_pl:
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mlx4_free_priv_pages(mr);
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err_free_mr:
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(void) mlx4_mr_free(dev->dev, &mr->mmr);
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err_free:
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kfree(mr);
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return ERR_PTR(err);
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}
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struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int acc,
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struct ib_fmr_attr *fmr_attr)
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{
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struct mlx4_ib_dev *dev = to_mdev(pd->device);
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struct mlx4_ib_fmr *fmr;
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int err = -ENOMEM;
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fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
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if (!fmr)
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return ERR_PTR(-ENOMEM);
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err = mlx4_fmr_alloc(dev->dev, to_mpd(pd)->pdn, convert_access(acc),
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fmr_attr->max_pages, fmr_attr->max_maps,
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fmr_attr->page_shift, &fmr->mfmr);
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if (err)
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goto err_free;
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err = mlx4_fmr_enable(to_mdev(pd->device)->dev, &fmr->mfmr);
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if (err)
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goto err_mr;
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fmr->ibfmr.rkey = fmr->ibfmr.lkey = fmr->mfmr.mr.key;
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return &fmr->ibfmr;
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err_mr:
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(void) mlx4_mr_free(to_mdev(pd->device)->dev, &fmr->mfmr.mr);
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err_free:
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kfree(fmr);
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return ERR_PTR(err);
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}
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int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
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int npages, u64 iova)
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{
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struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
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struct mlx4_ib_dev *dev = to_mdev(ifmr->ibfmr.device);
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return mlx4_map_phys_fmr(dev->dev, &ifmr->mfmr, page_list, npages, iova,
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&ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
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}
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int mlx4_ib_unmap_fmr(struct list_head *fmr_list)
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{
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struct ib_fmr *ibfmr;
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int err;
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struct mlx4_dev *mdev = NULL;
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list_for_each_entry(ibfmr, fmr_list, list) {
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if (mdev && to_mdev(ibfmr->device)->dev != mdev)
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return -EINVAL;
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mdev = to_mdev(ibfmr->device)->dev;
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}
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if (!mdev)
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return 0;
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list_for_each_entry(ibfmr, fmr_list, list) {
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struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
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mlx4_fmr_unmap(mdev, &ifmr->mfmr, &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
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}
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/*
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* Make sure all MPT status updates are visible before issuing
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* SYNC_TPT firmware command.
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*/
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wmb();
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err = mlx4_SYNC_TPT(mdev);
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if (err)
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pr_warn("SYNC_TPT error %d when "
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"unmapping FMRs\n", err);
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return 0;
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}
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int mlx4_ib_fmr_dealloc(struct ib_fmr *ibfmr)
|
|
{
|
|
struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
|
|
struct mlx4_ib_dev *dev = to_mdev(ibfmr->device);
|
|
int err;
|
|
|
|
err = mlx4_fmr_free(dev->dev, &ifmr->mfmr);
|
|
|
|
if (!err)
|
|
kfree(ifmr);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int mlx4_set_page(struct ib_mr *ibmr, u64 addr)
|
|
{
|
|
struct mlx4_ib_mr *mr = to_mmr(ibmr);
|
|
|
|
if (unlikely(mr->npages == mr->max_pages))
|
|
return -ENOMEM;
|
|
|
|
mr->pages[mr->npages++] = cpu_to_be64(addr | MLX4_MTT_FLAG_PRESENT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
|
|
unsigned int *sg_offset)
|
|
{
|
|
struct mlx4_ib_mr *mr = to_mmr(ibmr);
|
|
int rc;
|
|
|
|
mr->npages = 0;
|
|
|
|
ib_dma_sync_single_for_cpu(ibmr->device, mr->page_map,
|
|
mr->page_map_size, DMA_TO_DEVICE);
|
|
|
|
rc = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, mlx4_set_page);
|
|
|
|
ib_dma_sync_single_for_device(ibmr->device, mr->page_map,
|
|
mr->page_map_size, DMA_TO_DEVICE);
|
|
|
|
return rc;
|
|
}
|