Bo Yan 57adbeea64 coresight: etm4x: Fix bit shifting ... ctxid_pid and vmid_val in config are of type u64. When an integer 0xFF is being left shifted more than 32 bits, the behavior is undefined. The fix is to specify 0xFF as an unsigned long. Detected by Coverity scan: CID 37650, 37651 (Bad bit shift operation) Signed-off-by: Bo Yan <byan@nvidia.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2018-03-14 18:05:34 +01:00
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coresight	coresight: etm4x: Fix bit shifting	2018-03-14 18:05:34 +01:00
intel_th	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
stm	tracing: Pass export pointer as argument to ->write()	2017-12-04 07:14:30 -05:00