mirror of https://gitee.com/openkylin/linux.git
354ea2ee6d
As explained in previous patch, this SPI controller seems to be tested on SPI flash only before mass production and some bits are swizzled under other SPI modes probably due to incorrect wiring inside the silicon. Drop implementation of SPI mode 1/2/3 since they are broken. Also drop RT2880_SPI_MODE_BITS macro because we now have only SPI_LSB_FIRST implemented and the mode_bits is so short that we don't need a macro there. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Reviewed-by: NeilBrown <neil@brown.name> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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| spi-mt7621.c | ||