linux/drivers/pci/host
Jason Gunthorpe 2850b05c96 PCI: mvebu: Drop writes to bridge Secondary Status register
There are no writable bits in the secondary status register, only RO and
RW1C (write-1-to-clear) bits.  The driver never sets any of the RW1C bits,
so the status register should always be 0, just remove the set from the
write path.

Someday the RW1C bits should be copied/cleared directly from registers in
the HW.

[bhelgaas: changelog tweaks]
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
2013-11-26 11:12:49 -07:00
..
Kconfig PCI changes for the v3.13 merge window: 2013-11-14 14:02:00 +09:00
Makefile Merge branch 'pci/host-rcar' into next 2013-10-31 13:58:49 -06:00
pci-exynos.c PCI: exynos: Remove redundant of_match_ptr 2013-10-29 16:13:40 -06:00
pci-imx6.c PCI: imx6: Probe the PCIe in fs_initcall() 2013-10-31 11:34:04 -06:00
pci-mvebu.c PCI: mvebu: Drop writes to bridge Secondary Status register 2013-11-26 11:12:49 -07:00
pci-rcar-gen2.c PCI: Add R-Car Gen2 internal PCI support 2013-10-30 11:25:55 -06:00
pci-tegra.c PCI: Fix whitespace, capitalization, and spelling errors 2013-11-14 11:28:18 -07:00
pcie-designware.c PCI: Fix whitespace, capitalization, and spelling errors 2013-11-14 11:28:18 -07:00
pcie-designware.h PCI: designware: Add irq_create_mapping() 2013-10-09 09:14:23 -06:00