mirror of https://gitee.com/openkylin/linux.git
743 lines
17 KiB
C
743 lines
17 KiB
C
/*
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* SCI Clock driver for keystone based devices
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*
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* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
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* Tero Kristo <t-kristo@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/soc/ti/ti_sci_protocol.h>
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#include <linux/bsearch.h>
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#define SCI_CLK_SSC_ENABLE BIT(0)
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#define SCI_CLK_ALLOW_FREQ_CHANGE BIT(1)
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#define SCI_CLK_INPUT_TERMINATION BIT(2)
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/**
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* struct sci_clk_data - TI SCI clock data
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* @dev: device index
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* @num_clks: number of clocks for this device
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*/
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struct sci_clk_data {
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u16 dev;
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u16 num_clks;
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};
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/**
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* struct sci_clk_provider - TI SCI clock provider representation
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* @sci: Handle to the System Control Interface protocol handler
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* @ops: Pointer to the SCI ops to be used by the clocks
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* @dev: Device pointer for the clock provider
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* @clk_data: Clock data
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* @clocks: Clocks array for this device
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* @num_clocks: Total number of clocks for this provider
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*/
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struct sci_clk_provider {
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const struct ti_sci_handle *sci;
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const struct ti_sci_clk_ops *ops;
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struct device *dev;
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const struct sci_clk_data *clk_data;
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struct clk_hw **clocks;
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int num_clocks;
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};
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/**
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* struct sci_clk - TI SCI clock representation
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* @hw: Hardware clock cookie for common clock framework
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* @dev_id: Device index
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* @clk_id: Clock index
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* @provider: Master clock provider
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* @flags: Flags for the clock
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*/
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struct sci_clk {
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struct clk_hw hw;
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u16 dev_id;
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u8 clk_id;
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struct sci_clk_provider *provider;
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u8 flags;
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};
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#define to_sci_clk(_hw) container_of(_hw, struct sci_clk, hw)
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/**
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* sci_clk_prepare - Prepare (enable) a TI SCI clock
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* @hw: clock to prepare
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*
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* Prepares a clock to be actively used. Returns the SCI protocol status.
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*/
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static int sci_clk_prepare(struct clk_hw *hw)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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bool enable_ssc = clk->flags & SCI_CLK_SSC_ENABLE;
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bool allow_freq_change = clk->flags & SCI_CLK_ALLOW_FREQ_CHANGE;
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bool input_termination = clk->flags & SCI_CLK_INPUT_TERMINATION;
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return clk->provider->ops->get_clock(clk->provider->sci, clk->dev_id,
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clk->clk_id, enable_ssc,
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allow_freq_change,
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input_termination);
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}
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/**
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* sci_clk_unprepare - Un-prepares (disables) a TI SCI clock
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* @hw: clock to unprepare
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*
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* Un-prepares a clock from active state.
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*/
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static void sci_clk_unprepare(struct clk_hw *hw)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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int ret;
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ret = clk->provider->ops->put_clock(clk->provider->sci, clk->dev_id,
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clk->clk_id);
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if (ret)
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dev_err(clk->provider->dev,
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"unprepare failed for dev=%d, clk=%d, ret=%d\n",
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clk->dev_id, clk->clk_id, ret);
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}
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/**
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* sci_clk_is_prepared - Check if a TI SCI clock is prepared or not
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* @hw: clock to check status for
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*
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* Checks if a clock is prepared (enabled) in hardware. Returns non-zero
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* value if clock is enabled, zero otherwise.
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*/
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static int sci_clk_is_prepared(struct clk_hw *hw)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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bool req_state, current_state;
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int ret;
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ret = clk->provider->ops->is_on(clk->provider->sci, clk->dev_id,
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clk->clk_id, &req_state,
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¤t_state);
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if (ret) {
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dev_err(clk->provider->dev,
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"is_prepared failed for dev=%d, clk=%d, ret=%d\n",
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clk->dev_id, clk->clk_id, ret);
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return 0;
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}
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return req_state;
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}
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/**
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* sci_clk_recalc_rate - Get clock rate for a TI SCI clock
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* @hw: clock to get rate for
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* @parent_rate: parent rate provided by common clock framework, not used
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*
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* Gets the current clock rate of a TI SCI clock. Returns the current
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* clock rate, or zero in failure.
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*/
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static unsigned long sci_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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u64 freq;
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int ret;
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ret = clk->provider->ops->get_freq(clk->provider->sci, clk->dev_id,
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clk->clk_id, &freq);
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if (ret) {
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dev_err(clk->provider->dev,
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"recalc-rate failed for dev=%d, clk=%d, ret=%d\n",
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clk->dev_id, clk->clk_id, ret);
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return 0;
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}
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return freq;
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}
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/**
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* sci_clk_determine_rate - Determines a clock rate a clock can be set to
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* @hw: clock to change rate for
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* @req: requested rate configuration for the clock
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*
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* Determines a suitable clock rate and parent for a TI SCI clock.
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* The parent handling is un-used, as generally the parent clock rates
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* are not known by the kernel; instead these are internally handled
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* by the firmware. Returns 0 on success, negative error value on failure.
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*/
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static int sci_clk_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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int ret;
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u64 new_rate;
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ret = clk->provider->ops->get_best_match_freq(clk->provider->sci,
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clk->dev_id,
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clk->clk_id,
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req->min_rate,
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req->rate,
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req->max_rate,
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&new_rate);
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if (ret) {
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dev_err(clk->provider->dev,
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"determine-rate failed for dev=%d, clk=%d, ret=%d\n",
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clk->dev_id, clk->clk_id, ret);
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return ret;
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}
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req->rate = new_rate;
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return 0;
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}
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/**
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* sci_clk_set_rate - Set rate for a TI SCI clock
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* @hw: clock to change rate for
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* @rate: target rate for the clock
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* @parent_rate: rate of the clock parent, not used for TI SCI clocks
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*
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* Sets a clock frequency for a TI SCI clock. Returns the TI SCI
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* protocol status.
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*/
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static int sci_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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return clk->provider->ops->set_freq(clk->provider->sci, clk->dev_id,
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clk->clk_id, rate, rate, rate);
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}
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/**
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* sci_clk_get_parent - Get the current parent of a TI SCI clock
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* @hw: clock to get parent for
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*
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* Returns the index of the currently selected parent for a TI SCI clock.
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*/
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static u8 sci_clk_get_parent(struct clk_hw *hw)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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u8 parent_id;
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int ret;
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ret = clk->provider->ops->get_parent(clk->provider->sci, clk->dev_id,
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clk->clk_id, &parent_id);
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if (ret) {
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dev_err(clk->provider->dev,
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"get-parent failed for dev=%d, clk=%d, ret=%d\n",
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clk->dev_id, clk->clk_id, ret);
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return 0;
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}
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return parent_id - clk->clk_id - 1;
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}
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/**
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* sci_clk_set_parent - Set the parent of a TI SCI clock
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* @hw: clock to set parent for
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* @index: new parent index for the clock
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*
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* Sets the parent of a TI SCI clock. Return TI SCI protocol status.
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*/
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static int sci_clk_set_parent(struct clk_hw *hw, u8 index)
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{
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struct sci_clk *clk = to_sci_clk(hw);
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return clk->provider->ops->set_parent(clk->provider->sci, clk->dev_id,
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clk->clk_id,
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index + 1 + clk->clk_id);
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}
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static const struct clk_ops sci_clk_ops = {
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.prepare = sci_clk_prepare,
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.unprepare = sci_clk_unprepare,
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.is_prepared = sci_clk_is_prepared,
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.recalc_rate = sci_clk_recalc_rate,
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.determine_rate = sci_clk_determine_rate,
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.set_rate = sci_clk_set_rate,
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.get_parent = sci_clk_get_parent,
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.set_parent = sci_clk_set_parent,
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};
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/**
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* _sci_clk_get - Gets a handle for an SCI clock
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* @provider: Handle to SCI clock provider
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* @dev_id: device ID for the clock to register
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* @clk_id: clock ID for the clock to register
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*
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* Gets a handle to an existing TI SCI hw clock, or builds a new clock
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* entry and registers it with the common clock framework. Called from
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* the common clock framework, when a corresponding of_clk_get call is
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* executed, or recursively from itself when parsing parent clocks.
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* Returns a pointer to the hw clock struct, or ERR_PTR value in failure.
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*/
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static struct clk_hw *_sci_clk_build(struct sci_clk_provider *provider,
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u16 dev_id, u8 clk_id)
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{
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struct clk_init_data init = { NULL };
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struct sci_clk *sci_clk = NULL;
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char *name = NULL;
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char **parent_names = NULL;
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int i;
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int ret;
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sci_clk = devm_kzalloc(provider->dev, sizeof(*sci_clk), GFP_KERNEL);
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if (!sci_clk)
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return ERR_PTR(-ENOMEM);
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sci_clk->dev_id = dev_id;
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sci_clk->clk_id = clk_id;
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sci_clk->provider = provider;
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ret = provider->ops->get_num_parents(provider->sci, dev_id,
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clk_id,
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&init.num_parents);
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if (ret)
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goto err;
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name = kasprintf(GFP_KERNEL, "%s:%d:%d", dev_name(provider->dev),
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sci_clk->dev_id, sci_clk->clk_id);
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init.name = name;
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/*
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* From kernel point of view, we only care about a clocks parents,
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* if it has more than 1 possible parent. In this case, it is going
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* to have mux functionality. Otherwise it is going to act as a root
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* clock.
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*/
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if (init.num_parents < 2)
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init.num_parents = 0;
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if (init.num_parents) {
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parent_names = kcalloc(init.num_parents, sizeof(char *),
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GFP_KERNEL);
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if (!parent_names) {
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ret = -ENOMEM;
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goto err;
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}
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for (i = 0; i < init.num_parents; i++) {
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char *parent_name;
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parent_name = kasprintf(GFP_KERNEL, "%s:%d:%d",
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dev_name(provider->dev),
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sci_clk->dev_id,
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sci_clk->clk_id + 1 + i);
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if (!parent_name) {
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ret = -ENOMEM;
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goto err;
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}
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parent_names[i] = parent_name;
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}
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init.parent_names = (void *)parent_names;
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}
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init.ops = &sci_clk_ops;
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sci_clk->hw.init = &init;
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ret = devm_clk_hw_register(provider->dev, &sci_clk->hw);
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if (ret)
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dev_err(provider->dev, "failed clk register with %d\n", ret);
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err:
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if (parent_names) {
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for (i = 0; i < init.num_parents; i++)
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kfree(parent_names[i]);
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kfree(parent_names);
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}
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kfree(name);
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if (ret)
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return ERR_PTR(ret);
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return &sci_clk->hw;
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}
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static int _cmp_sci_clk(const void *a, const void *b)
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{
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const struct sci_clk *ca = a;
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const struct sci_clk *cb = *(struct sci_clk **)b;
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if (ca->dev_id == cb->dev_id && ca->clk_id == cb->clk_id)
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return 0;
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if (ca->dev_id > cb->dev_id ||
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(ca->dev_id == cb->dev_id && ca->clk_id > cb->clk_id))
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return 1;
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return -1;
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}
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/**
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* sci_clk_get - Xlate function for getting clock handles
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* @clkspec: device tree clock specifier
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* @data: pointer to the clock provider
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*
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* Xlate function for retrieving clock TI SCI hw clock handles based on
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* device tree clock specifier. Called from the common clock framework,
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* when a corresponding of_clk_get call is executed. Returns a pointer
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* to the TI SCI hw clock struct, or ERR_PTR value in failure.
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*/
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static struct clk_hw *sci_clk_get(struct of_phandle_args *clkspec, void *data)
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{
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struct sci_clk_provider *provider = data;
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struct sci_clk **clk;
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struct sci_clk key;
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if (clkspec->args_count != 2)
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return ERR_PTR(-EINVAL);
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key.dev_id = clkspec->args[0];
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key.clk_id = clkspec->args[1];
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clk = bsearch(&key, provider->clocks, provider->num_clocks,
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sizeof(clk), _cmp_sci_clk);
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if (!clk)
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return ERR_PTR(-ENODEV);
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return &(*clk)->hw;
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}
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static int ti_sci_init_clocks(struct sci_clk_provider *p)
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{
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const struct sci_clk_data *data = p->clk_data;
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struct clk_hw *hw;
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int i;
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int num_clks = 0;
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while (data->num_clks) {
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num_clks += data->num_clks;
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data++;
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}
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p->num_clocks = num_clks;
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p->clocks = devm_kcalloc(p->dev, num_clks, sizeof(struct sci_clk),
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GFP_KERNEL);
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if (!p->clocks)
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return -ENOMEM;
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num_clks = 0;
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data = p->clk_data;
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while (data->num_clks) {
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for (i = 0; i < data->num_clks; i++) {
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hw = _sci_clk_build(p, data->dev, i);
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if (!IS_ERR(hw)) {
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p->clocks[num_clks++] = hw;
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continue;
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}
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/* Skip any holes in the clock lists */
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if (PTR_ERR(hw) == -ENODEV)
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continue;
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return PTR_ERR(hw);
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}
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data++;
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}
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return 0;
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}
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static const struct sci_clk_data k2g_clk_data[] = {
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/* pmmc */
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{ .dev = 0x0, .num_clks = 4 },
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/* mlb0 */
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{ .dev = 0x1, .num_clks = 5 },
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/* dss0 */
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{ .dev = 0x2, .num_clks = 2 },
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/* mcbsp0 */
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{ .dev = 0x3, .num_clks = 8 },
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/* mcasp0 */
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{ .dev = 0x4, .num_clks = 8 },
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/* mcasp1 */
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{ .dev = 0x5, .num_clks = 8 },
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/* mcasp2 */
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{ .dev = 0x6, .num_clks = 8 },
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/* dcan0 */
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{ .dev = 0x8, .num_clks = 2 },
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/* dcan1 */
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{ .dev = 0x9, .num_clks = 2 },
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/* emif0 */
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{ .dev = 0xa, .num_clks = 6 },
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/* mmchs0 */
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{ .dev = 0xb, .num_clks = 3 },
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/* mmchs1 */
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{ .dev = 0xc, .num_clks = 3 },
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/* gpmc0 */
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{ .dev = 0xd, .num_clks = 1 },
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/* elm0 */
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{ .dev = 0xe, .num_clks = 1 },
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/* spi0 */
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{ .dev = 0x10, .num_clks = 1 },
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/* spi1 */
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{ .dev = 0x11, .num_clks = 1 },
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/* spi2 */
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{ .dev = 0x12, .num_clks = 1 },
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/* spi3 */
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{ .dev = 0x13, .num_clks = 1 },
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|
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/* icss0 */
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{ .dev = 0x14, .num_clks = 6 },
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/* icss1 */
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{ .dev = 0x15, .num_clks = 6 },
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|
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/* usb0 */
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{ .dev = 0x16, .num_clks = 7 },
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|
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/* usb1 */
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{ .dev = 0x17, .num_clks = 7 },
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|
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/* nss0 */
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{ .dev = 0x18, .num_clks = 14 },
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|
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/* pcie0 */
|
|
{ .dev = 0x19, .num_clks = 1 },
|
|
|
|
/* gpio0 */
|
|
{ .dev = 0x1b, .num_clks = 1 },
|
|
|
|
/* gpio1 */
|
|
{ .dev = 0x1c, .num_clks = 1 },
|
|
|
|
/* timer64_0 */
|
|
{ .dev = 0x1d, .num_clks = 9 },
|
|
|
|
/* timer64_1 */
|
|
{ .dev = 0x1e, .num_clks = 9 },
|
|
|
|
/* timer64_2 */
|
|
{ .dev = 0x1f, .num_clks = 9 },
|
|
|
|
/* timer64_3 */
|
|
{ .dev = 0x20, .num_clks = 9 },
|
|
|
|
/* timer64_4 */
|
|
{ .dev = 0x21, .num_clks = 9 },
|
|
|
|
/* timer64_5 */
|
|
{ .dev = 0x22, .num_clks = 9 },
|
|
|
|
/* timer64_6 */
|
|
{ .dev = 0x23, .num_clks = 9 },
|
|
|
|
/* msgmgr0 */
|
|
{ .dev = 0x25, .num_clks = 1 },
|
|
|
|
/* bootcfg0 */
|
|
{ .dev = 0x26, .num_clks = 1 },
|
|
|
|
/* arm_bootrom0 */
|
|
{ .dev = 0x27, .num_clks = 1 },
|
|
|
|
/* dsp_bootrom0 */
|
|
{ .dev = 0x29, .num_clks = 1 },
|
|
|
|
/* debugss0 */
|
|
{ .dev = 0x2b, .num_clks = 8 },
|
|
|
|
/* uart0 */
|
|
{ .dev = 0x2c, .num_clks = 1 },
|
|
|
|
/* uart1 */
|
|
{ .dev = 0x2d, .num_clks = 1 },
|
|
|
|
/* uart2 */
|
|
{ .dev = 0x2e, .num_clks = 1 },
|
|
|
|
/* ehrpwm0 */
|
|
{ .dev = 0x2f, .num_clks = 1 },
|
|
|
|
/* ehrpwm1 */
|
|
{ .dev = 0x30, .num_clks = 1 },
|
|
|
|
/* ehrpwm2 */
|
|
{ .dev = 0x31, .num_clks = 1 },
|
|
|
|
/* ehrpwm3 */
|
|
{ .dev = 0x32, .num_clks = 1 },
|
|
|
|
/* ehrpwm4 */
|
|
{ .dev = 0x33, .num_clks = 1 },
|
|
|
|
/* ehrpwm5 */
|
|
{ .dev = 0x34, .num_clks = 1 },
|
|
|
|
/* eqep0 */
|
|
{ .dev = 0x35, .num_clks = 1 },
|
|
|
|
/* eqep1 */
|
|
{ .dev = 0x36, .num_clks = 1 },
|
|
|
|
/* eqep2 */
|
|
{ .dev = 0x37, .num_clks = 1 },
|
|
|
|
/* ecap0 */
|
|
{ .dev = 0x38, .num_clks = 1 },
|
|
|
|
/* ecap1 */
|
|
{ .dev = 0x39, .num_clks = 1 },
|
|
|
|
/* i2c0 */
|
|
{ .dev = 0x3a, .num_clks = 1 },
|
|
|
|
/* i2c1 */
|
|
{ .dev = 0x3b, .num_clks = 1 },
|
|
|
|
/* i2c2 */
|
|
{ .dev = 0x3c, .num_clks = 1 },
|
|
|
|
/* edma0 */
|
|
{ .dev = 0x3f, .num_clks = 2 },
|
|
|
|
/* semaphore0 */
|
|
{ .dev = 0x40, .num_clks = 1 },
|
|
|
|
/* intc0 */
|
|
{ .dev = 0x41, .num_clks = 1 },
|
|
|
|
/* gic0 */
|
|
{ .dev = 0x42, .num_clks = 1 },
|
|
|
|
/* qspi0 */
|
|
{ .dev = 0x43, .num_clks = 5 },
|
|
|
|
/* arm_64b_counter0 */
|
|
{ .dev = 0x44, .num_clks = 2 },
|
|
|
|
/* tetris0 */
|
|
{ .dev = 0x45, .num_clks = 2 },
|
|
|
|
/* cgem0 */
|
|
{ .dev = 0x46, .num_clks = 2 },
|
|
|
|
/* msmc0 */
|
|
{ .dev = 0x47, .num_clks = 1 },
|
|
|
|
/* cbass0 */
|
|
{ .dev = 0x49, .num_clks = 1 },
|
|
|
|
/* board0 */
|
|
{ .dev = 0x4c, .num_clks = 36 },
|
|
|
|
/* edma1 */
|
|
{ .dev = 0x4f, .num_clks = 2 },
|
|
{ .num_clks = 0 },
|
|
};
|
|
|
|
static const struct of_device_id ti_sci_clk_of_match[] = {
|
|
{ .compatible = "ti,k2g-sci-clk", .data = &k2g_clk_data },
|
|
{ /* Sentinel */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ti_sci_clk_of_match);
|
|
|
|
/**
|
|
* ti_sci_clk_probe - Probe function for the TI SCI clock driver
|
|
* @pdev: platform device pointer to be probed
|
|
*
|
|
* Probes the TI SCI clock device. Allocates a new clock provider
|
|
* and registers this to the common clock framework. Also applies
|
|
* any required flags to the identified clocks via clock lists
|
|
* supplied from DT. Returns 0 for success, negative error value
|
|
* for failure.
|
|
*/
|
|
static int ti_sci_clk_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *np = dev->of_node;
|
|
struct sci_clk_provider *provider;
|
|
const struct ti_sci_handle *handle;
|
|
const struct sci_clk_data *data;
|
|
int ret;
|
|
|
|
data = of_device_get_match_data(dev);
|
|
if (!data)
|
|
return -EINVAL;
|
|
|
|
handle = devm_ti_sci_get_handle(dev);
|
|
if (IS_ERR(handle))
|
|
return PTR_ERR(handle);
|
|
|
|
provider = devm_kzalloc(dev, sizeof(*provider), GFP_KERNEL);
|
|
if (!provider)
|
|
return -ENOMEM;
|
|
|
|
provider->clk_data = data;
|
|
|
|
provider->sci = handle;
|
|
provider->ops = &handle->ops.clk_ops;
|
|
provider->dev = dev;
|
|
|
|
ret = ti_sci_init_clocks(provider);
|
|
if (ret) {
|
|
pr_err("ti-sci-init-clocks failed.\n");
|
|
return ret;
|
|
}
|
|
|
|
return of_clk_add_hw_provider(np, sci_clk_get, provider);
|
|
}
|
|
|
|
/**
|
|
* ti_sci_clk_remove - Remove TI SCI clock device
|
|
* @pdev: platform device pointer for the device to be removed
|
|
*
|
|
* Removes the TI SCI device. Unregisters the clock provider registered
|
|
* via common clock framework. Any memory allocated for the device will
|
|
* be free'd silently via the devm framework. Returns 0 always.
|
|
*/
|
|
static int ti_sci_clk_remove(struct platform_device *pdev)
|
|
{
|
|
of_clk_del_provider(pdev->dev.of_node);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver ti_sci_clk_driver = {
|
|
.probe = ti_sci_clk_probe,
|
|
.remove = ti_sci_clk_remove,
|
|
.driver = {
|
|
.name = "ti-sci-clk",
|
|
.of_match_table = of_match_ptr(ti_sci_clk_of_match),
|
|
},
|
|
};
|
|
module_platform_driver(ti_sci_clk_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("TI System Control Interface(SCI) Clock driver");
|
|
MODULE_AUTHOR("Tero Kristo");
|
|
MODULE_ALIAS("platform:ti-sci-clk");
|