James Hogan d85ebff007 MIPS: KVM: Fix pre-r6 ll/sc instructions on r6 ... The atomic KVM register access macros in kvm_host.h (for the guest Cause register with KVM in trap & emulate mode) use ll/sc instructions, however they still .set mips3, which causes pre-MIPSr6 instruction encodings to be emitted, even for a MIPSr6 build. Fix it to use MIPS_ISA_ARCH_LEVEL as other parts of arch/mips already do. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim KrÄmář <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2016-07-05 16:09:13 +02:00
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asm	MIPS: KVM: Fix pre-r6 ll/sc instructions on r6	2016-07-05 16:09:13 +02:00
uapi/asm	MIPS: inst.h: Rename cbcond{0,1}_op to pop{1,3}0_op	2016-07-05 16:09:07 +02:00