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28 lines
1.1 KiB
Plaintext
28 lines
1.1 KiB
Plaintext
Rockchip PWM controller
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Required properties:
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- compatible: should be "rockchip,<name>-pwm"
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"rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
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"rockchip,rk3288-pwm": found on RK3288 SOC
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"rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
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"rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
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- reg: physical base address and length of the controller's registers
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- clocks: See ../clock/clock-bindings.txt
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- For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
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- There is one clock that's used both to derive the functional clock
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for the device and as the bus clock.
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- For newer hardware (rk3328 and future socs): specified by name
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- "pwm": This is used to derive the functional clock.
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- "pclk": This is the APB bus clock.
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- #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
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for a description of the cell format.
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Example:
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pwm0: pwm@20030000 {
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compatible = "rockchip,rk2928-pwm";
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reg = <0x20030000 0x10>;
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clocks = <&cru PCLK_PWM01>;
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#pwm-cells = <2>;
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};
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