mirror of https://gitee.com/openkylin/linux.git
1042 lines
25 KiB
C
1042 lines
25 KiB
C
/*
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* Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "iw_cxgb4.h"
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static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
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struct c4iw_dev_ucontext *uctx, struct sk_buff *skb,
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struct c4iw_wr_wait *wr_waitp)
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{
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struct fw_ri_res_wr *res_wr;
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struct fw_ri_res *res;
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int wr_len;
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int ret;
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wr_len = sizeof *res_wr + sizeof *res;
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set_wr_txq(skb, CPL_PRIORITY_CONTROL, 0);
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res_wr = __skb_put_zero(skb, wr_len);
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res_wr->op_nres = cpu_to_be32(
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FW_WR_OP_V(FW_RI_RES_WR) |
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FW_RI_RES_WR_NRES_V(1) |
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FW_WR_COMPL_F);
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res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16));
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res_wr->cookie = (uintptr_t)wr_waitp;
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res = res_wr->res;
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res->u.cq.restype = FW_RI_RES_TYPE_CQ;
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res->u.cq.op = FW_RI_RES_OP_RESET;
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res->u.cq.iqid = cpu_to_be32(cq->cqid);
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c4iw_init_wr_wait(wr_waitp);
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ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__);
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kfree(cq->sw_queue);
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dma_free_coherent(&(rdev->lldi.pdev->dev),
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cq->memsize, cq->queue,
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dma_unmap_addr(cq, mapping));
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c4iw_put_cqid(rdev, cq->cqid, uctx);
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return ret;
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}
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static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
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struct c4iw_dev_ucontext *uctx,
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struct c4iw_wr_wait *wr_waitp)
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{
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struct fw_ri_res_wr *res_wr;
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struct fw_ri_res *res;
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int wr_len;
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int user = (uctx != &rdev->uctx);
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int ret;
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struct sk_buff *skb;
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cq->cqid = c4iw_get_cqid(rdev, uctx);
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if (!cq->cqid) {
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ret = -ENOMEM;
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goto err1;
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}
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if (!user) {
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cq->sw_queue = kzalloc(cq->memsize, GFP_KERNEL);
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if (!cq->sw_queue) {
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ret = -ENOMEM;
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goto err2;
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}
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}
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cq->queue = dma_alloc_coherent(&rdev->lldi.pdev->dev, cq->memsize,
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&cq->dma_addr, GFP_KERNEL);
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if (!cq->queue) {
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ret = -ENOMEM;
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goto err3;
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}
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dma_unmap_addr_set(cq, mapping, cq->dma_addr);
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memset(cq->queue, 0, cq->memsize);
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/* build fw_ri_res_wr */
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wr_len = sizeof *res_wr + sizeof *res;
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skb = alloc_skb(wr_len, GFP_KERNEL);
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if (!skb) {
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ret = -ENOMEM;
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goto err4;
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}
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set_wr_txq(skb, CPL_PRIORITY_CONTROL, 0);
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res_wr = __skb_put_zero(skb, wr_len);
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res_wr->op_nres = cpu_to_be32(
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FW_WR_OP_V(FW_RI_RES_WR) |
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FW_RI_RES_WR_NRES_V(1) |
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FW_WR_COMPL_F);
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res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16));
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res_wr->cookie = (uintptr_t)wr_waitp;
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res = res_wr->res;
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res->u.cq.restype = FW_RI_RES_TYPE_CQ;
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res->u.cq.op = FW_RI_RES_OP_WRITE;
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res->u.cq.iqid = cpu_to_be32(cq->cqid);
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res->u.cq.iqandst_to_iqandstindex = cpu_to_be32(
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FW_RI_RES_WR_IQANUS_V(0) |
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FW_RI_RES_WR_IQANUD_V(1) |
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FW_RI_RES_WR_IQANDST_F |
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FW_RI_RES_WR_IQANDSTINDEX_V(
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rdev->lldi.ciq_ids[cq->vector]));
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res->u.cq.iqdroprss_to_iqesize = cpu_to_be16(
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FW_RI_RES_WR_IQDROPRSS_F |
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FW_RI_RES_WR_IQPCIECH_V(2) |
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FW_RI_RES_WR_IQINTCNTTHRESH_V(0) |
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FW_RI_RES_WR_IQO_F |
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FW_RI_RES_WR_IQESIZE_V(1));
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res->u.cq.iqsize = cpu_to_be16(cq->size);
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res->u.cq.iqaddr = cpu_to_be64(cq->dma_addr);
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c4iw_init_wr_wait(wr_waitp);
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ret = c4iw_ref_send_wait(rdev, skb, wr_waitp, 0, 0, __func__);
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if (ret)
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goto err4;
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cq->gen = 1;
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cq->gts = rdev->lldi.gts_reg;
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cq->rdev = rdev;
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cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS,
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&cq->bar2_qid,
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user ? &cq->bar2_pa : NULL);
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if (user && !cq->bar2_pa) {
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pr_warn("%s: cqid %u not in BAR2 range\n",
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pci_name(rdev->lldi.pdev), cq->cqid);
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ret = -EINVAL;
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goto err4;
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}
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return 0;
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err4:
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dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue,
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dma_unmap_addr(cq, mapping));
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err3:
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kfree(cq->sw_queue);
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err2:
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c4iw_put_cqid(rdev, cq->cqid, uctx);
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err1:
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return ret;
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}
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static void insert_recv_cqe(struct t4_wq *wq, struct t4_cq *cq)
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{
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struct t4_cqe cqe;
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pr_debug("wq %p cq %p sw_cidx %u sw_pidx %u\n",
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wq, cq, cq->sw_cidx, cq->sw_pidx);
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memset(&cqe, 0, sizeof(cqe));
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cqe.header = cpu_to_be32(CQE_STATUS_V(T4_ERR_SWFLUSH) |
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CQE_OPCODE_V(FW_RI_SEND) |
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CQE_TYPE_V(0) |
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CQE_SWCQE_V(1) |
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CQE_QPID_V(wq->sq.qid));
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cqe.bits_type_ts = cpu_to_be64(CQE_GENBIT_V((u64)cq->gen));
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cq->sw_queue[cq->sw_pidx] = cqe;
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t4_swcq_produce(cq);
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}
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int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count)
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{
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int flushed = 0;
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int in_use = wq->rq.in_use - count;
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pr_debug("wq %p cq %p rq.in_use %u skip count %u\n",
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wq, cq, wq->rq.in_use, count);
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while (in_use--) {
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insert_recv_cqe(wq, cq);
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flushed++;
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}
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return flushed;
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}
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static void insert_sq_cqe(struct t4_wq *wq, struct t4_cq *cq,
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struct t4_swsqe *swcqe)
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{
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struct t4_cqe cqe;
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pr_debug("wq %p cq %p sw_cidx %u sw_pidx %u\n",
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wq, cq, cq->sw_cidx, cq->sw_pidx);
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memset(&cqe, 0, sizeof(cqe));
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cqe.header = cpu_to_be32(CQE_STATUS_V(T4_ERR_SWFLUSH) |
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CQE_OPCODE_V(swcqe->opcode) |
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CQE_TYPE_V(1) |
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CQE_SWCQE_V(1) |
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CQE_QPID_V(wq->sq.qid));
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CQE_WRID_SQ_IDX(&cqe) = swcqe->idx;
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cqe.bits_type_ts = cpu_to_be64(CQE_GENBIT_V((u64)cq->gen));
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cq->sw_queue[cq->sw_pidx] = cqe;
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t4_swcq_produce(cq);
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}
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static void advance_oldest_read(struct t4_wq *wq);
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int c4iw_flush_sq(struct c4iw_qp *qhp)
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{
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int flushed = 0;
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struct t4_wq *wq = &qhp->wq;
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struct c4iw_cq *chp = to_c4iw_cq(qhp->ibqp.send_cq);
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struct t4_cq *cq = &chp->cq;
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int idx;
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struct t4_swsqe *swsqe;
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if (wq->sq.flush_cidx == -1)
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wq->sq.flush_cidx = wq->sq.cidx;
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idx = wq->sq.flush_cidx;
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while (idx != wq->sq.pidx) {
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swsqe = &wq->sq.sw_sq[idx];
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swsqe->flushed = 1;
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insert_sq_cqe(wq, cq, swsqe);
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if (wq->sq.oldest_read == swsqe) {
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advance_oldest_read(wq);
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}
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flushed++;
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if (++idx == wq->sq.size)
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idx = 0;
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}
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wq->sq.flush_cidx += flushed;
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if (wq->sq.flush_cidx >= wq->sq.size)
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wq->sq.flush_cidx -= wq->sq.size;
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return flushed;
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}
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static void flush_completed_wrs(struct t4_wq *wq, struct t4_cq *cq)
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{
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struct t4_swsqe *swsqe;
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int cidx;
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if (wq->sq.flush_cidx == -1)
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wq->sq.flush_cidx = wq->sq.cidx;
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cidx = wq->sq.flush_cidx;
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while (cidx != wq->sq.pidx) {
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swsqe = &wq->sq.sw_sq[cidx];
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if (!swsqe->signaled) {
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if (++cidx == wq->sq.size)
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cidx = 0;
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} else if (swsqe->complete) {
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/*
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* Insert this completed cqe into the swcq.
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*/
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pr_debug("moving cqe into swcq sq idx %u cq idx %u\n",
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cidx, cq->sw_pidx);
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swsqe->cqe.header |= htonl(CQE_SWCQE_V(1));
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cq->sw_queue[cq->sw_pidx] = swsqe->cqe;
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t4_swcq_produce(cq);
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swsqe->flushed = 1;
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if (++cidx == wq->sq.size)
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cidx = 0;
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wq->sq.flush_cidx = cidx;
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} else
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break;
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}
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}
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static void create_read_req_cqe(struct t4_wq *wq, struct t4_cqe *hw_cqe,
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struct t4_cqe *read_cqe)
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{
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read_cqe->u.scqe.cidx = wq->sq.oldest_read->idx;
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read_cqe->len = htonl(wq->sq.oldest_read->read_len);
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read_cqe->header = htonl(CQE_QPID_V(CQE_QPID(hw_cqe)) |
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CQE_SWCQE_V(SW_CQE(hw_cqe)) |
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CQE_OPCODE_V(FW_RI_READ_REQ) |
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CQE_TYPE_V(1));
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read_cqe->bits_type_ts = hw_cqe->bits_type_ts;
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}
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static void advance_oldest_read(struct t4_wq *wq)
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{
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u32 rptr = wq->sq.oldest_read - wq->sq.sw_sq + 1;
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if (rptr == wq->sq.size)
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rptr = 0;
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while (rptr != wq->sq.pidx) {
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wq->sq.oldest_read = &wq->sq.sw_sq[rptr];
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if (wq->sq.oldest_read->opcode == FW_RI_READ_REQ)
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return;
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if (++rptr == wq->sq.size)
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rptr = 0;
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}
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wq->sq.oldest_read = NULL;
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}
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/*
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* Move all CQEs from the HWCQ into the SWCQ.
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* Deal with out-of-order and/or completions that complete
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* prior unsignalled WRs.
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*/
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void c4iw_flush_hw_cq(struct c4iw_cq *chp, struct c4iw_qp *flush_qhp)
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{
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struct t4_cqe *hw_cqe, *swcqe, read_cqe;
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struct c4iw_qp *qhp;
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struct t4_swsqe *swsqe;
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int ret;
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pr_debug("cqid 0x%x\n", chp->cq.cqid);
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ret = t4_next_hw_cqe(&chp->cq, &hw_cqe);
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/*
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* This logic is similar to poll_cq(), but not quite the same
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* unfortunately. Need to move pertinent HW CQEs to the SW CQ but
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* also do any translation magic that poll_cq() normally does.
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*/
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while (!ret) {
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qhp = get_qhp(chp->rhp, CQE_QPID(hw_cqe));
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/*
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* drop CQEs with no associated QP
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*/
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if (qhp == NULL)
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goto next_cqe;
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if (flush_qhp != qhp) {
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spin_lock(&qhp->lock);
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if (qhp->wq.flushed == 1)
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goto next_cqe;
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}
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if (CQE_OPCODE(hw_cqe) == FW_RI_TERMINATE)
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goto next_cqe;
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if (CQE_OPCODE(hw_cqe) == FW_RI_READ_RESP) {
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|
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/* If we have reached here because of async
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* event or other error, and have egress error
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* then drop
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*/
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if (CQE_TYPE(hw_cqe) == 1)
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goto next_cqe;
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|
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/* drop peer2peer RTR reads.
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*/
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if (CQE_WRID_STAG(hw_cqe) == 1)
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goto next_cqe;
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|
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/*
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* Eat completions for unsignaled read WRs.
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*/
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if (!qhp->wq.sq.oldest_read->signaled) {
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advance_oldest_read(&qhp->wq);
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goto next_cqe;
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}
|
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|
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/*
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* Don't write to the HWCQ, create a new read req CQE
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* in local memory and move it into the swcq.
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*/
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create_read_req_cqe(&qhp->wq, hw_cqe, &read_cqe);
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hw_cqe = &read_cqe;
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advance_oldest_read(&qhp->wq);
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}
|
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|
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/* if its a SQ completion, then do the magic to move all the
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* unsignaled and now in-order completions into the swcq.
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*/
|
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if (SQ_TYPE(hw_cqe)) {
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swsqe = &qhp->wq.sq.sw_sq[CQE_WRID_SQ_IDX(hw_cqe)];
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swsqe->cqe = *hw_cqe;
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swsqe->complete = 1;
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flush_completed_wrs(&qhp->wq, &chp->cq);
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} else {
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swcqe = &chp->cq.sw_queue[chp->cq.sw_pidx];
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*swcqe = *hw_cqe;
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swcqe->header |= cpu_to_be32(CQE_SWCQE_V(1));
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t4_swcq_produce(&chp->cq);
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}
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next_cqe:
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t4_hwcq_consume(&chp->cq);
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ret = t4_next_hw_cqe(&chp->cq, &hw_cqe);
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if (qhp && flush_qhp != qhp)
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spin_unlock(&qhp->lock);
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}
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}
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|
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static int cqe_completes_wr(struct t4_cqe *cqe, struct t4_wq *wq)
|
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{
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if (DRAIN_CQE(cqe)) {
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WARN_ONCE(1, "Unexpected DRAIN CQE qp id %u!\n", wq->sq.qid);
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return 0;
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}
|
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|
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if (CQE_OPCODE(cqe) == FW_RI_TERMINATE)
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return 0;
|
|
|
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if ((CQE_OPCODE(cqe) == FW_RI_RDMA_WRITE) && RQ_TYPE(cqe))
|
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return 0;
|
|
|
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if ((CQE_OPCODE(cqe) == FW_RI_READ_RESP) && SQ_TYPE(cqe))
|
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return 0;
|
|
|
|
if (CQE_SEND_OPCODE(cqe) && RQ_TYPE(cqe) && t4_rq_empty(wq))
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return 0;
|
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return 1;
|
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}
|
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|
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void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count)
|
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{
|
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struct t4_cqe *cqe;
|
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u32 ptr;
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|
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*count = 0;
|
|
pr_debug("count zero %d\n", *count);
|
|
ptr = cq->sw_cidx;
|
|
while (ptr != cq->sw_pidx) {
|
|
cqe = &cq->sw_queue[ptr];
|
|
if (RQ_TYPE(cqe) && (CQE_OPCODE(cqe) != FW_RI_READ_RESP) &&
|
|
(CQE_QPID(cqe) == wq->sq.qid) && cqe_completes_wr(cqe, wq))
|
|
(*count)++;
|
|
if (++ptr == cq->size)
|
|
ptr = 0;
|
|
}
|
|
pr_debug("cq %p count %d\n", cq, *count);
|
|
}
|
|
|
|
/*
|
|
* poll_cq
|
|
*
|
|
* Caller must:
|
|
* check the validity of the first CQE,
|
|
* supply the wq assicated with the qpid.
|
|
*
|
|
* credit: cq credit to return to sge.
|
|
* cqe_flushed: 1 iff the CQE is flushed.
|
|
* cqe: copy of the polled CQE.
|
|
*
|
|
* return value:
|
|
* 0 CQE returned ok.
|
|
* -EAGAIN CQE skipped, try again.
|
|
* -EOVERFLOW CQ overflow detected.
|
|
*/
|
|
static int poll_cq(struct t4_wq *wq, struct t4_cq *cq, struct t4_cqe *cqe,
|
|
u8 *cqe_flushed, u64 *cookie, u32 *credit)
|
|
{
|
|
int ret = 0;
|
|
struct t4_cqe *hw_cqe, read_cqe;
|
|
|
|
*cqe_flushed = 0;
|
|
*credit = 0;
|
|
ret = t4_next_cqe(cq, &hw_cqe);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pr_debug("CQE OVF %u qpid 0x%0x genbit %u type %u status 0x%0x opcode 0x%0x len 0x%0x wrid_hi_stag 0x%x wrid_low_msn 0x%x\n",
|
|
CQE_OVFBIT(hw_cqe), CQE_QPID(hw_cqe),
|
|
CQE_GENBIT(hw_cqe), CQE_TYPE(hw_cqe), CQE_STATUS(hw_cqe),
|
|
CQE_OPCODE(hw_cqe), CQE_LEN(hw_cqe), CQE_WRID_HI(hw_cqe),
|
|
CQE_WRID_LOW(hw_cqe));
|
|
|
|
/*
|
|
* skip cqe's not affiliated with a QP.
|
|
*/
|
|
if (wq == NULL) {
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/*
|
|
* skip hw cqe's if the wq is flushed.
|
|
*/
|
|
if (wq->flushed && !SW_CQE(hw_cqe)) {
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/*
|
|
* skip TERMINATE cqes...
|
|
*/
|
|
if (CQE_OPCODE(hw_cqe) == FW_RI_TERMINATE) {
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/*
|
|
* Special cqe for drain WR completions...
|
|
*/
|
|
if (DRAIN_CQE(hw_cqe)) {
|
|
*cookie = CQE_DRAIN_COOKIE(hw_cqe);
|
|
*cqe = *hw_cqe;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/*
|
|
* Gotta tweak READ completions:
|
|
* 1) the cqe doesn't contain the sq_wptr from the wr.
|
|
* 2) opcode not reflected from the wr.
|
|
* 3) read_len not reflected from the wr.
|
|
* 4) cq_type is RQ_TYPE not SQ_TYPE.
|
|
*/
|
|
if (RQ_TYPE(hw_cqe) && (CQE_OPCODE(hw_cqe) == FW_RI_READ_RESP)) {
|
|
|
|
/* If we have reached here because of async
|
|
* event or other error, and have egress error
|
|
* then drop
|
|
*/
|
|
if (CQE_TYPE(hw_cqe) == 1) {
|
|
if (CQE_STATUS(hw_cqe))
|
|
t4_set_wq_in_error(wq);
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/* If this is an unsolicited read response, then the read
|
|
* was generated by the kernel driver as part of peer-2-peer
|
|
* connection setup. So ignore the completion.
|
|
*/
|
|
if (CQE_WRID_STAG(hw_cqe) == 1) {
|
|
if (CQE_STATUS(hw_cqe))
|
|
t4_set_wq_in_error(wq);
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/*
|
|
* Eat completions for unsignaled read WRs.
|
|
*/
|
|
if (!wq->sq.oldest_read->signaled) {
|
|
advance_oldest_read(wq);
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
|
|
/*
|
|
* Don't write to the HWCQ, so create a new read req CQE
|
|
* in local memory.
|
|
*/
|
|
create_read_req_cqe(wq, hw_cqe, &read_cqe);
|
|
hw_cqe = &read_cqe;
|
|
advance_oldest_read(wq);
|
|
}
|
|
|
|
if (CQE_STATUS(hw_cqe) || t4_wq_in_error(wq)) {
|
|
*cqe_flushed = (CQE_STATUS(hw_cqe) == T4_ERR_SWFLUSH);
|
|
t4_set_wq_in_error(wq);
|
|
}
|
|
|
|
/*
|
|
* RECV completion.
|
|
*/
|
|
if (RQ_TYPE(hw_cqe)) {
|
|
|
|
/*
|
|
* HW only validates 4 bits of MSN. So we must validate that
|
|
* the MSN in the SEND is the next expected MSN. If its not,
|
|
* then we complete this with T4_ERR_MSN and mark the wq in
|
|
* error.
|
|
*/
|
|
|
|
if (t4_rq_empty(wq)) {
|
|
t4_set_wq_in_error(wq);
|
|
ret = -EAGAIN;
|
|
goto skip_cqe;
|
|
}
|
|
if (unlikely(!CQE_STATUS(hw_cqe) &&
|
|
CQE_WRID_MSN(hw_cqe) != wq->rq.msn)) {
|
|
t4_set_wq_in_error(wq);
|
|
hw_cqe->header |= cpu_to_be32(CQE_STATUS_V(T4_ERR_MSN));
|
|
}
|
|
goto proc_cqe;
|
|
}
|
|
|
|
/*
|
|
* If we get here its a send completion.
|
|
*
|
|
* Handle out of order completion. These get stuffed
|
|
* in the SW SQ. Then the SW SQ is walked to move any
|
|
* now in-order completions into the SW CQ. This handles
|
|
* 2 cases:
|
|
* 1) reaping unsignaled WRs when the first subsequent
|
|
* signaled WR is completed.
|
|
* 2) out of order read completions.
|
|
*/
|
|
if (!SW_CQE(hw_cqe) && (CQE_WRID_SQ_IDX(hw_cqe) != wq->sq.cidx)) {
|
|
struct t4_swsqe *swsqe;
|
|
|
|
pr_debug("out of order completion going in sw_sq at idx %u\n",
|
|
CQE_WRID_SQ_IDX(hw_cqe));
|
|
swsqe = &wq->sq.sw_sq[CQE_WRID_SQ_IDX(hw_cqe)];
|
|
swsqe->cqe = *hw_cqe;
|
|
swsqe->complete = 1;
|
|
ret = -EAGAIN;
|
|
goto flush_wq;
|
|
}
|
|
|
|
proc_cqe:
|
|
*cqe = *hw_cqe;
|
|
|
|
/*
|
|
* Reap the associated WR(s) that are freed up with this
|
|
* completion.
|
|
*/
|
|
if (SQ_TYPE(hw_cqe)) {
|
|
int idx = CQE_WRID_SQ_IDX(hw_cqe);
|
|
|
|
/*
|
|
* Account for any unsignaled completions completed by
|
|
* this signaled completion. In this case, cidx points
|
|
* to the first unsignaled one, and idx points to the
|
|
* signaled one. So adjust in_use based on this delta.
|
|
* if this is not completing any unsigned wrs, then the
|
|
* delta will be 0. Handle wrapping also!
|
|
*/
|
|
if (idx < wq->sq.cidx)
|
|
wq->sq.in_use -= wq->sq.size + idx - wq->sq.cidx;
|
|
else
|
|
wq->sq.in_use -= idx - wq->sq.cidx;
|
|
|
|
wq->sq.cidx = (uint16_t)idx;
|
|
pr_debug("completing sq idx %u\n", wq->sq.cidx);
|
|
*cookie = wq->sq.sw_sq[wq->sq.cidx].wr_id;
|
|
if (c4iw_wr_log)
|
|
c4iw_log_wr_stats(wq, hw_cqe);
|
|
t4_sq_consume(wq);
|
|
} else {
|
|
pr_debug("completing rq idx %u\n", wq->rq.cidx);
|
|
*cookie = wq->rq.sw_rq[wq->rq.cidx].wr_id;
|
|
if (c4iw_wr_log)
|
|
c4iw_log_wr_stats(wq, hw_cqe);
|
|
t4_rq_consume(wq);
|
|
goto skip_cqe;
|
|
}
|
|
|
|
flush_wq:
|
|
/*
|
|
* Flush any completed cqes that are now in-order.
|
|
*/
|
|
flush_completed_wrs(wq, cq);
|
|
|
|
skip_cqe:
|
|
if (SW_CQE(hw_cqe)) {
|
|
pr_debug("cq %p cqid 0x%x skip sw cqe cidx %u\n",
|
|
cq, cq->cqid, cq->sw_cidx);
|
|
t4_swcq_consume(cq);
|
|
} else {
|
|
pr_debug("cq %p cqid 0x%x skip hw cqe cidx %u\n",
|
|
cq, cq->cqid, cq->cidx);
|
|
t4_hwcq_consume(cq);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Get one cq entry from c4iw and map it to openib.
|
|
*
|
|
* Returns:
|
|
* 0 cqe returned
|
|
* -ENODATA EMPTY;
|
|
* -EAGAIN caller must try again
|
|
* any other -errno fatal error
|
|
*/
|
|
static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc)
|
|
{
|
|
struct c4iw_qp *qhp = NULL;
|
|
struct t4_cqe uninitialized_var(cqe), *rd_cqe;
|
|
struct t4_wq *wq;
|
|
u32 credit = 0;
|
|
u8 cqe_flushed;
|
|
u64 cookie = 0;
|
|
int ret;
|
|
|
|
ret = t4_next_cqe(&chp->cq, &rd_cqe);
|
|
|
|
if (ret)
|
|
return ret;
|
|
|
|
qhp = get_qhp(chp->rhp, CQE_QPID(rd_cqe));
|
|
if (!qhp)
|
|
wq = NULL;
|
|
else {
|
|
spin_lock(&qhp->lock);
|
|
wq = &(qhp->wq);
|
|
}
|
|
ret = poll_cq(wq, &(chp->cq), &cqe, &cqe_flushed, &cookie, &credit);
|
|
if (ret)
|
|
goto out;
|
|
|
|
wc->wr_id = cookie;
|
|
wc->qp = &qhp->ibqp;
|
|
wc->vendor_err = CQE_STATUS(&cqe);
|
|
wc->wc_flags = 0;
|
|
|
|
pr_debug("qpid 0x%x type %d opcode %d status 0x%x len %u wrid hi 0x%x lo 0x%x cookie 0x%llx\n",
|
|
CQE_QPID(&cqe),
|
|
CQE_TYPE(&cqe), CQE_OPCODE(&cqe),
|
|
CQE_STATUS(&cqe), CQE_LEN(&cqe),
|
|
CQE_WRID_HI(&cqe), CQE_WRID_LOW(&cqe),
|
|
(unsigned long long)cookie);
|
|
|
|
if (CQE_TYPE(&cqe) == 0) {
|
|
if (!CQE_STATUS(&cqe))
|
|
wc->byte_len = CQE_LEN(&cqe);
|
|
else
|
|
wc->byte_len = 0;
|
|
wc->opcode = IB_WC_RECV;
|
|
if (CQE_OPCODE(&cqe) == FW_RI_SEND_WITH_INV ||
|
|
CQE_OPCODE(&cqe) == FW_RI_SEND_WITH_SE_INV) {
|
|
wc->ex.invalidate_rkey = CQE_WRID_STAG(&cqe);
|
|
wc->wc_flags |= IB_WC_WITH_INVALIDATE;
|
|
c4iw_invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
|
|
}
|
|
} else {
|
|
switch (CQE_OPCODE(&cqe)) {
|
|
case FW_RI_RDMA_WRITE:
|
|
wc->opcode = IB_WC_RDMA_WRITE;
|
|
break;
|
|
case FW_RI_READ_REQ:
|
|
wc->opcode = IB_WC_RDMA_READ;
|
|
wc->byte_len = CQE_LEN(&cqe);
|
|
break;
|
|
case FW_RI_SEND_WITH_INV:
|
|
case FW_RI_SEND_WITH_SE_INV:
|
|
wc->opcode = IB_WC_SEND;
|
|
wc->wc_flags |= IB_WC_WITH_INVALIDATE;
|
|
break;
|
|
case FW_RI_SEND:
|
|
case FW_RI_SEND_WITH_SE:
|
|
wc->opcode = IB_WC_SEND;
|
|
break;
|
|
|
|
case FW_RI_LOCAL_INV:
|
|
wc->opcode = IB_WC_LOCAL_INV;
|
|
break;
|
|
case FW_RI_FAST_REGISTER:
|
|
wc->opcode = IB_WC_REG_MR;
|
|
|
|
/* Invalidate the MR if the fastreg failed */
|
|
if (CQE_STATUS(&cqe) != T4_ERR_SUCCESS)
|
|
c4iw_invalidate_mr(qhp->rhp,
|
|
CQE_WRID_FR_STAG(&cqe));
|
|
break;
|
|
default:
|
|
pr_err("Unexpected opcode %d in the CQE received for QPID=0x%0x\n",
|
|
CQE_OPCODE(&cqe), CQE_QPID(&cqe));
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
if (cqe_flushed)
|
|
wc->status = IB_WC_WR_FLUSH_ERR;
|
|
else {
|
|
|
|
switch (CQE_STATUS(&cqe)) {
|
|
case T4_ERR_SUCCESS:
|
|
wc->status = IB_WC_SUCCESS;
|
|
break;
|
|
case T4_ERR_STAG:
|
|
wc->status = IB_WC_LOC_ACCESS_ERR;
|
|
break;
|
|
case T4_ERR_PDID:
|
|
wc->status = IB_WC_LOC_PROT_ERR;
|
|
break;
|
|
case T4_ERR_QPID:
|
|
case T4_ERR_ACCESS:
|
|
wc->status = IB_WC_LOC_ACCESS_ERR;
|
|
break;
|
|
case T4_ERR_WRAP:
|
|
wc->status = IB_WC_GENERAL_ERR;
|
|
break;
|
|
case T4_ERR_BOUND:
|
|
wc->status = IB_WC_LOC_LEN_ERR;
|
|
break;
|
|
case T4_ERR_INVALIDATE_SHARED_MR:
|
|
case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:
|
|
wc->status = IB_WC_MW_BIND_ERR;
|
|
break;
|
|
case T4_ERR_CRC:
|
|
case T4_ERR_MARKER:
|
|
case T4_ERR_PDU_LEN_ERR:
|
|
case T4_ERR_OUT_OF_RQE:
|
|
case T4_ERR_DDP_VERSION:
|
|
case T4_ERR_RDMA_VERSION:
|
|
case T4_ERR_DDP_QUEUE_NUM:
|
|
case T4_ERR_MSN:
|
|
case T4_ERR_TBIT:
|
|
case T4_ERR_MO:
|
|
case T4_ERR_MSN_RANGE:
|
|
case T4_ERR_IRD_OVERFLOW:
|
|
case T4_ERR_OPCODE:
|
|
case T4_ERR_INTERNAL_ERR:
|
|
wc->status = IB_WC_FATAL_ERR;
|
|
break;
|
|
case T4_ERR_SWFLUSH:
|
|
wc->status = IB_WC_WR_FLUSH_ERR;
|
|
break;
|
|
default:
|
|
pr_err("Unexpected cqe_status 0x%x for QPID=0x%0x\n",
|
|
CQE_STATUS(&cqe), CQE_QPID(&cqe));
|
|
wc->status = IB_WC_FATAL_ERR;
|
|
}
|
|
}
|
|
out:
|
|
if (wq)
|
|
spin_unlock(&qhp->lock);
|
|
return ret;
|
|
}
|
|
|
|
int c4iw_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
|
|
{
|
|
struct c4iw_cq *chp;
|
|
unsigned long flags;
|
|
int npolled;
|
|
int err = 0;
|
|
|
|
chp = to_c4iw_cq(ibcq);
|
|
|
|
spin_lock_irqsave(&chp->lock, flags);
|
|
for (npolled = 0; npolled < num_entries; ++npolled) {
|
|
do {
|
|
err = c4iw_poll_cq_one(chp, wc + npolled);
|
|
} while (err == -EAGAIN);
|
|
if (err)
|
|
break;
|
|
}
|
|
spin_unlock_irqrestore(&chp->lock, flags);
|
|
return !err || err == -ENODATA ? npolled : err;
|
|
}
|
|
|
|
int c4iw_destroy_cq(struct ib_cq *ib_cq)
|
|
{
|
|
struct c4iw_cq *chp;
|
|
struct c4iw_ucontext *ucontext;
|
|
|
|
pr_debug("ib_cq %p\n", ib_cq);
|
|
chp = to_c4iw_cq(ib_cq);
|
|
|
|
remove_handle(chp->rhp, &chp->rhp->cqidr, chp->cq.cqid);
|
|
atomic_dec(&chp->refcnt);
|
|
wait_event(chp->wait, !atomic_read(&chp->refcnt));
|
|
|
|
ucontext = ib_cq->uobject ? to_c4iw_ucontext(ib_cq->uobject->context)
|
|
: NULL;
|
|
destroy_cq(&chp->rhp->rdev, &chp->cq,
|
|
ucontext ? &ucontext->uctx : &chp->cq.rdev->uctx,
|
|
chp->destroy_skb, chp->wr_waitp);
|
|
c4iw_put_wr_wait(chp->wr_waitp);
|
|
kfree(chp);
|
|
return 0;
|
|
}
|
|
|
|
struct ib_cq *c4iw_create_cq(struct ib_device *ibdev,
|
|
const struct ib_cq_init_attr *attr,
|
|
struct ib_ucontext *ib_context,
|
|
struct ib_udata *udata)
|
|
{
|
|
int entries = attr->cqe;
|
|
int vector = attr->comp_vector;
|
|
struct c4iw_dev *rhp;
|
|
struct c4iw_cq *chp;
|
|
struct c4iw_create_cq_resp uresp;
|
|
struct c4iw_ucontext *ucontext = NULL;
|
|
int ret, wr_len;
|
|
size_t memsize, hwentries;
|
|
struct c4iw_mm_entry *mm, *mm2;
|
|
|
|
pr_debug("ib_dev %p entries %d\n", ibdev, entries);
|
|
if (attr->flags)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
rhp = to_c4iw_dev(ibdev);
|
|
|
|
if (vector >= rhp->rdev.lldi.nciq)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
chp = kzalloc(sizeof(*chp), GFP_KERNEL);
|
|
if (!chp)
|
|
return ERR_PTR(-ENOMEM);
|
|
chp->wr_waitp = c4iw_alloc_wr_wait(GFP_KERNEL);
|
|
if (!chp->wr_waitp) {
|
|
ret = -ENOMEM;
|
|
goto err_free_chp;
|
|
}
|
|
c4iw_init_wr_wait(chp->wr_waitp);
|
|
|
|
wr_len = sizeof(struct fw_ri_res_wr) + sizeof(struct fw_ri_res);
|
|
chp->destroy_skb = alloc_skb(wr_len, GFP_KERNEL);
|
|
if (!chp->destroy_skb) {
|
|
ret = -ENOMEM;
|
|
goto err_free_wr_wait;
|
|
}
|
|
|
|
if (ib_context)
|
|
ucontext = to_c4iw_ucontext(ib_context);
|
|
|
|
/* account for the status page. */
|
|
entries++;
|
|
|
|
/* IQ needs one extra entry to differentiate full vs empty. */
|
|
entries++;
|
|
|
|
/*
|
|
* entries must be multiple of 16 for HW.
|
|
*/
|
|
entries = roundup(entries, 16);
|
|
|
|
/*
|
|
* Make actual HW queue 2x to avoid cdix_inc overflows.
|
|
*/
|
|
hwentries = min(entries * 2, rhp->rdev.hw_queue.t4_max_iq_size);
|
|
|
|
/*
|
|
* Make HW queue at least 64 entries so GTS updates aren't too
|
|
* frequent.
|
|
*/
|
|
if (hwentries < 64)
|
|
hwentries = 64;
|
|
|
|
memsize = hwentries * sizeof *chp->cq.queue;
|
|
|
|
/*
|
|
* memsize must be a multiple of the page size if its a user cq.
|
|
*/
|
|
if (ucontext)
|
|
memsize = roundup(memsize, PAGE_SIZE);
|
|
chp->cq.size = hwentries;
|
|
chp->cq.memsize = memsize;
|
|
chp->cq.vector = vector;
|
|
|
|
ret = create_cq(&rhp->rdev, &chp->cq,
|
|
ucontext ? &ucontext->uctx : &rhp->rdev.uctx,
|
|
chp->wr_waitp);
|
|
if (ret)
|
|
goto err_free_skb;
|
|
|
|
chp->rhp = rhp;
|
|
chp->cq.size--; /* status page */
|
|
chp->ibcq.cqe = entries - 2;
|
|
spin_lock_init(&chp->lock);
|
|
spin_lock_init(&chp->comp_handler_lock);
|
|
atomic_set(&chp->refcnt, 1);
|
|
init_waitqueue_head(&chp->wait);
|
|
ret = insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid);
|
|
if (ret)
|
|
goto err_destroy_cq;
|
|
|
|
if (ucontext) {
|
|
ret = -ENOMEM;
|
|
mm = kmalloc(sizeof *mm, GFP_KERNEL);
|
|
if (!mm)
|
|
goto err_remove_handle;
|
|
mm2 = kmalloc(sizeof *mm2, GFP_KERNEL);
|
|
if (!mm2)
|
|
goto err_free_mm;
|
|
|
|
uresp.qid_mask = rhp->rdev.cqmask;
|
|
uresp.cqid = chp->cq.cqid;
|
|
uresp.size = chp->cq.size;
|
|
uresp.memsize = chp->cq.memsize;
|
|
spin_lock(&ucontext->mmap_lock);
|
|
uresp.key = ucontext->key;
|
|
ucontext->key += PAGE_SIZE;
|
|
uresp.gts_key = ucontext->key;
|
|
ucontext->key += PAGE_SIZE;
|
|
spin_unlock(&ucontext->mmap_lock);
|
|
ret = ib_copy_to_udata(udata, &uresp,
|
|
sizeof(uresp) - sizeof(uresp.reserved));
|
|
if (ret)
|
|
goto err_free_mm2;
|
|
|
|
mm->key = uresp.key;
|
|
mm->addr = virt_to_phys(chp->cq.queue);
|
|
mm->len = chp->cq.memsize;
|
|
insert_mmap(ucontext, mm);
|
|
|
|
mm2->key = uresp.gts_key;
|
|
mm2->addr = chp->cq.bar2_pa;
|
|
mm2->len = PAGE_SIZE;
|
|
insert_mmap(ucontext, mm2);
|
|
}
|
|
pr_debug("cqid 0x%0x chp %p size %u memsize %zu, dma_addr 0x%0llx\n",
|
|
chp->cq.cqid, chp, chp->cq.size,
|
|
chp->cq.memsize, (unsigned long long)chp->cq.dma_addr);
|
|
return &chp->ibcq;
|
|
err_free_mm2:
|
|
kfree(mm2);
|
|
err_free_mm:
|
|
kfree(mm);
|
|
err_remove_handle:
|
|
remove_handle(rhp, &rhp->cqidr, chp->cq.cqid);
|
|
err_destroy_cq:
|
|
destroy_cq(&chp->rhp->rdev, &chp->cq,
|
|
ucontext ? &ucontext->uctx : &rhp->rdev.uctx,
|
|
chp->destroy_skb, chp->wr_waitp);
|
|
err_free_skb:
|
|
kfree_skb(chp->destroy_skb);
|
|
err_free_wr_wait:
|
|
c4iw_put_wr_wait(chp->wr_waitp);
|
|
err_free_chp:
|
|
kfree(chp);
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
int c4iw_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata)
|
|
{
|
|
return -ENOSYS;
|
|
}
|
|
|
|
int c4iw_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags)
|
|
{
|
|
struct c4iw_cq *chp;
|
|
int ret = 0;
|
|
unsigned long flag;
|
|
|
|
chp = to_c4iw_cq(ibcq);
|
|
spin_lock_irqsave(&chp->lock, flag);
|
|
t4_arm_cq(&chp->cq,
|
|
(flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED);
|
|
if (flags & IB_CQ_REPORT_MISSED_EVENTS)
|
|
ret = t4_cq_notempty(&chp->cq);
|
|
spin_unlock_irqrestore(&chp->lock, flag);
|
|
return ret;
|
|
}
|