mirror of https://gitee.com/openkylin/linux.git
186 lines
4.9 KiB
C
186 lines
4.9 KiB
C
/*
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* Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/jiffies.h>
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#include "mlx4.h"
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int mlx4_reset(struct mlx4_dev *dev)
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{
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void __iomem *reset;
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u32 *hca_header = NULL;
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int pcie_cap;
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u16 devctl;
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u16 linkctl;
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u16 vendor;
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unsigned long end;
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u32 sem;
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int i;
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int err = 0;
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#define MLX4_RESET_BASE 0xf0000
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#define MLX4_RESET_SIZE 0x400
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#define MLX4_SEM_OFFSET 0x3fc
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#define MLX4_RESET_OFFSET 0x10
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#define MLX4_RESET_VALUE swab32(1)
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#define MLX4_SEM_TIMEOUT_JIFFIES (10 * HZ)
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#define MLX4_RESET_TIMEOUT_JIFFIES (2 * HZ)
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/*
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* Reset the chip. This is somewhat ugly because we have to
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* save off the PCI header before reset and then restore it
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* after the chip reboots. We skip config space offsets 22
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* and 23 since those have a special meaning.
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*/
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/* Do we need to save off the full 4K PCI Express header?? */
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hca_header = kmalloc(256, GFP_KERNEL);
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if (!hca_header) {
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err = -ENOMEM;
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mlx4_err(dev, "Couldn't allocate memory to save HCA "
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"PCI header, aborting.\n");
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goto out;
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}
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pcie_cap = pci_pcie_cap(dev->pdev);
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for (i = 0; i < 64; ++i) {
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if (i == 22 || i == 23)
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continue;
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if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) {
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err = -ENODEV;
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mlx4_err(dev, "Couldn't save HCA "
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"PCI header, aborting.\n");
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goto out;
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}
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}
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reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE,
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MLX4_RESET_SIZE);
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if (!reset) {
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err = -ENOMEM;
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mlx4_err(dev, "Couldn't map HCA reset register, aborting.\n");
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goto out;
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}
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/* grab HW semaphore to lock out flash updates */
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end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES;
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do {
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sem = readl(reset + MLX4_SEM_OFFSET);
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if (!sem)
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break;
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msleep(1);
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} while (time_before(jiffies, end));
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if (sem) {
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mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n");
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err = -EAGAIN;
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iounmap(reset);
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goto out;
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}
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/* actually hit reset */
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writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);
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iounmap(reset);
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/* Docs say to wait one second before accessing device */
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msleep(1000);
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end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES;
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do {
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if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) &&
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vendor != 0xffff)
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break;
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msleep(1);
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} while (time_before(jiffies, end));
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if (vendor == 0xffff) {
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err = -ENODEV;
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mlx4_err(dev, "PCI device did not come back after reset, "
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"aborting.\n");
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goto out;
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}
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/* Now restore the PCI headers */
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if (pcie_cap) {
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devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4];
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if (pcie_capability_write_word(dev->pdev, PCI_EXP_DEVCTL,
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devctl)) {
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err = -ENODEV;
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mlx4_err(dev, "Couldn't restore HCA PCI Express "
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"Device Control register, aborting.\n");
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goto out;
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}
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linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4];
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if (pcie_capability_write_word(dev->pdev, PCI_EXP_LNKCTL,
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linkctl)) {
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err = -ENODEV;
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mlx4_err(dev, "Couldn't restore HCA PCI Express "
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"Link control register, aborting.\n");
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goto out;
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}
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}
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for (i = 0; i < 16; ++i) {
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if (i * 4 == PCI_COMMAND)
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continue;
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if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) {
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err = -ENODEV;
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mlx4_err(dev, "Couldn't restore HCA reg %x, "
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"aborting.\n", i);
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goto out;
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}
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}
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if (pci_write_config_dword(dev->pdev, PCI_COMMAND,
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hca_header[PCI_COMMAND / 4])) {
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err = -ENODEV;
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mlx4_err(dev, "Couldn't restore HCA COMMAND, "
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"aborting.\n");
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goto out;
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}
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out:
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kfree(hca_header);
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return err;
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}
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