mirror of https://gitee.com/openkylin/linux.git
216 lines
4.2 KiB
Plaintext
216 lines
4.2 KiB
Plaintext
/*
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* Device Tree file for Marvell Armada 370 Reference Design board
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* (RD-88F6710-A1)
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*
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* Copied from arch/arm/boot/dts/armada-370-db.dts
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*
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* Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* Note: this Device Tree assumes that the bootloader has remapped the
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* internal registers to 0xf1000000 (instead of the default
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* 0xd0000000). The 0xf1000000 is the default used by the recent,
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* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
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* boards were delivered with an older version of the bootloader that
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* left internal registers mapped at 0xd0000000. If you are in this
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* situation, you should either update your bootloader (preferred
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* solution) or the below Device Tree should be adjusted.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-370.dtsi"
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/ {
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model = "Marvell Armada 370 Reference Design";
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compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
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pcie-controller {
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status = "okay";
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/* Internal mini-PCIe connector */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* Internal mini-PCIe connector */
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pcie@2,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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internal-regs {
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serial@12000 {
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status = "okay";
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};
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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mdio {
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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ethernet@70000 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "sgmii";
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};
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ethernet@74000 {
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pinctrl-0 = <&ge1_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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mvsdio@d4000 {
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pinctrl-0 = <&sdio_pins1>;
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pinctrl-names = "default";
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status = "okay";
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/* No CD or WP GPIOs */
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broken-cd;
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};
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usb@50000 {
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status = "okay";
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};
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usb@51000 {
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status = "okay";
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@1 {
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label = "Software Button";
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linux,code = <KEY_POWER>;
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gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-fan {
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compatible = "gpio-fan";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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gpio-fan,speed-map = <0 0 3000 1>;
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pinctrl-0 = <&fan_pins>;
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pinctrl-names = "default";
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};
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gpio_leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins>;
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sw_led {
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label = "370rd:green:sw";
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gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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};
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nand@d0000 {
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status = "okay";
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num-cs = <1>;
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marvell,nand-keep-config;
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marvell,nand-enable-arbiter;
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nand-on-flash-bbt;
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partition@0 {
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label = "U-Boot";
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reg = <0 0x800000>;
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};
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partition@800000 {
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label = "Linux";
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reg = <0x800000 0x800000>;
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};
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partition@1000000 {
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label = "Filesystem";
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reg = <0x1000000 0x3f000000>;
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};
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};
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};
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};
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dsa@0 {
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compatible = "marvell,dsa";
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#address-cells = <2>;
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#size-cells = <0>;
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dsa,ethernet = <ð1>;
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dsa,mii-bus = <&mdio>;
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switch@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */
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port@0 {
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reg = <0>;
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label = "lan0";
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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};
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};
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};
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};
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&pinctrl {
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fan_pins: fan-pins {
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marvell,pins = "mpp8";
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marvell,function = "gpio";
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};
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led_pins: led-pins {
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marvell,pins = "mpp32";
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marvell,function = "gpio";
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};
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};
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