Ard Biesheuvel 793acf870e arm64: KVM: Describe data or unified caches as having 1 set and 1 way ... On SMP ARM systems, cache maintenance by set/way should only ever be done in the context of onlining or offlining CPUs, which is typically done by bare metal firmware and never in a virtual machine. For this reason, we trap set/way cache maintenance operations and replace them with conditional flushing of the entire guest address space. Due to this trapping, the set/way arguments passed into the set/way ops are completely ignored, and thus irrelevant. This also means that the set/way geometry is equally irrelevant, and we can simply report it as 1 set and 1 way, so that legacy 32-bit ARM system software (i.e., the kind that only receives odd fixes) doesn't take a performance hit due to the trapping when iterating over the cachelines. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2019-02-19 21:05:49 +00:00
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asm	arm64: KVM: Describe data or unified caches as having 1 set and 1 way	2019-02-19 21:05:49 +00:00
uapi/asm	arch: remove redundant UAPI generic-y defines	2019-01-06 10:22:15 +09:00