linux/arch/arm/mach-sti
Arnd Bergmann a98405432e Highlights:
-----------
 - Add a dummy L2 cache's write_sec callback as in non secure mode execution,
    we can't get access to L2 cache secure registers
 - Cosmetics change, in case of dump_stack, update the hardware name with a
    more generic for the STi SoCs family
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Merge tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/soc

Merge "STi SoC changes for v4.8" from Patrice Chotard:

- Add a dummy L2 cache's write_sec callback as in non secure mode execution,
   we can't get access to L2 cache secure registers
- Cosmetics change, in case of dump_stack, update the hardware name with a
   more generic for the STi SoCs family

* tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: sti: Implement dummy L2 cache's write_sec
  ARM: STi: Update machine _namestr to be more generic.
2016-07-14 15:08:15 +02:00
..
Kconfig ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB 2016-06-03 12:18:13 -07:00
Makefile ARM: sti: Add STiH415 SOC support 2013-06-25 13:26:47 -07:00
board-dt.c ARM: sti: Implement dummy L2 cache's write_sec 2016-07-11 09:15:44 +02:00
headsmp.S ARM: STi: Add code to release secondary cores from holding pen. 2015-07-22 11:14:18 +02:00
platsmp.c ARM: use const and __initconst for smp_operations 2015-12-01 22:17:45 +01:00
smp.h ARM: use const and __initconst for smp_operations 2015-12-01 22:17:45 +01:00