mirror of https://gitee.com/openkylin/linux.git
317 lines
8.6 KiB
C
317 lines
8.6 KiB
C
/*
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* Copyright 2010 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Alex Deucher
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*/
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#include <linux/firmware.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "radeon.h"
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#include "radeon_asic.h"
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#include "radeon_drm.h"
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#include "nid.h"
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#include "atom.h"
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#include "ni_reg.h"
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#define EVERGREEN_PFP_UCODE_SIZE 1120
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#define EVERGREEN_PM4_UCODE_SIZE 1376
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#define EVERGREEN_RLC_UCODE_SIZE 768
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#define BTC_MC_UCODE_SIZE 6024
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/* Firmware Names */
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MODULE_FIRMWARE("radeon/BARTS_pfp.bin");
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MODULE_FIRMWARE("radeon/BARTS_me.bin");
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MODULE_FIRMWARE("radeon/BARTS_mc.bin");
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MODULE_FIRMWARE("radeon/BTC_rlc.bin");
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MODULE_FIRMWARE("radeon/TURKS_pfp.bin");
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MODULE_FIRMWARE("radeon/TURKS_me.bin");
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MODULE_FIRMWARE("radeon/TURKS_mc.bin");
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MODULE_FIRMWARE("radeon/CAICOS_pfp.bin");
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MODULE_FIRMWARE("radeon/CAICOS_me.bin");
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MODULE_FIRMWARE("radeon/CAICOS_mc.bin");
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#define BTC_IO_MC_REGS_SIZE 29
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static const u32 barts_io_mc_regs[BTC_IO_MC_REGS_SIZE][2] = {
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{0x00000077, 0xff010100},
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{0x00000078, 0x00000000},
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{0x00000079, 0x00001434},
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{0x0000007a, 0xcc08ec08},
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{0x0000007b, 0x00040000},
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{0x0000007c, 0x000080c0},
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{0x0000007d, 0x09000000},
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{0x0000007e, 0x00210404},
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{0x00000081, 0x08a8e800},
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{0x00000082, 0x00030444},
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{0x00000083, 0x00000000},
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{0x00000085, 0x00000001},
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{0x00000086, 0x00000002},
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{0x00000087, 0x48490000},
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{0x00000088, 0x20244647},
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{0x00000089, 0x00000005},
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{0x0000008b, 0x66030000},
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{0x0000008c, 0x00006603},
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{0x0000008d, 0x00000100},
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{0x0000008f, 0x00001c0a},
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{0x00000090, 0xff000001},
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{0x00000094, 0x00101101},
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{0x00000095, 0x00000fff},
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{0x00000096, 0x00116fff},
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{0x00000097, 0x60010000},
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{0x00000098, 0x10010000},
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{0x00000099, 0x00006000},
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{0x0000009a, 0x00001000},
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{0x0000009f, 0x00946a00}
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};
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static const u32 turks_io_mc_regs[BTC_IO_MC_REGS_SIZE][2] = {
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{0x00000077, 0xff010100},
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{0x00000078, 0x00000000},
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{0x00000079, 0x00001434},
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{0x0000007a, 0xcc08ec08},
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{0x0000007b, 0x00040000},
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{0x0000007c, 0x000080c0},
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{0x0000007d, 0x09000000},
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{0x0000007e, 0x00210404},
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{0x00000081, 0x08a8e800},
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{0x00000082, 0x00030444},
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{0x00000083, 0x00000000},
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{0x00000085, 0x00000001},
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{0x00000086, 0x00000002},
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{0x00000087, 0x48490000},
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{0x00000088, 0x20244647},
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{0x00000089, 0x00000005},
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{0x0000008b, 0x66030000},
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{0x0000008c, 0x00006603},
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{0x0000008d, 0x00000100},
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{0x0000008f, 0x00001c0a},
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{0x00000090, 0xff000001},
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{0x00000094, 0x00101101},
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{0x00000095, 0x00000fff},
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{0x00000096, 0x00116fff},
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{0x00000097, 0x60010000},
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{0x00000098, 0x10010000},
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{0x00000099, 0x00006000},
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{0x0000009a, 0x00001000},
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{0x0000009f, 0x00936a00}
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};
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static const u32 caicos_io_mc_regs[BTC_IO_MC_REGS_SIZE][2] = {
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{0x00000077, 0xff010100},
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{0x00000078, 0x00000000},
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{0x00000079, 0x00001434},
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{0x0000007a, 0xcc08ec08},
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{0x0000007b, 0x00040000},
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{0x0000007c, 0x000080c0},
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{0x0000007d, 0x09000000},
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{0x0000007e, 0x00210404},
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{0x00000081, 0x08a8e800},
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{0x00000082, 0x00030444},
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{0x00000083, 0x00000000},
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{0x00000085, 0x00000001},
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{0x00000086, 0x00000002},
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{0x00000087, 0x48490000},
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{0x00000088, 0x20244647},
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{0x00000089, 0x00000005},
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{0x0000008b, 0x66030000},
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{0x0000008c, 0x00006603},
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{0x0000008d, 0x00000100},
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{0x0000008f, 0x00001c0a},
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{0x00000090, 0xff000001},
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{0x00000094, 0x00101101},
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{0x00000095, 0x00000fff},
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{0x00000096, 0x00116fff},
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{0x00000097, 0x60010000},
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{0x00000098, 0x10010000},
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{0x00000099, 0x00006000},
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{0x0000009a, 0x00001000},
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{0x0000009f, 0x00916a00}
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};
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int btc_mc_load_microcode(struct radeon_device *rdev)
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{
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const __be32 *fw_data;
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u32 mem_type, running, blackout = 0;
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u32 *io_mc_regs;
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int i;
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if (!rdev->mc_fw)
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return -EINVAL;
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switch (rdev->family) {
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case CHIP_BARTS:
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io_mc_regs = (u32 *)&barts_io_mc_regs;
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break;
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case CHIP_TURKS:
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io_mc_regs = (u32 *)&turks_io_mc_regs;
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break;
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case CHIP_CAICOS:
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default:
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io_mc_regs = (u32 *)&caicos_io_mc_regs;
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break;
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}
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mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT;
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running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
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if ((mem_type == MC_SEQ_MISC0_GDDR5_VALUE) && (running == 0)) {
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if (running) {
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blackout = RREG32(MC_SHARED_BLACKOUT_CNTL);
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WREG32(MC_SHARED_BLACKOUT_CNTL, 1);
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}
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/* reset the engine and set to writable */
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WREG32(MC_SEQ_SUP_CNTL, 0x00000008);
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WREG32(MC_SEQ_SUP_CNTL, 0x00000010);
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/* load mc io regs */
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for (i = 0; i < BTC_IO_MC_REGS_SIZE; i++) {
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WREG32(MC_SEQ_IO_DEBUG_INDEX, io_mc_regs[(i << 1)]);
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WREG32(MC_SEQ_IO_DEBUG_DATA, io_mc_regs[(i << 1) + 1]);
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}
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/* load the MC ucode */
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fw_data = (const __be32 *)rdev->mc_fw->data;
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for (i = 0; i < BTC_MC_UCODE_SIZE; i++)
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WREG32(MC_SEQ_SUP_PGM, be32_to_cpup(fw_data++));
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/* put the engine back into the active state */
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WREG32(MC_SEQ_SUP_CNTL, 0x00000008);
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WREG32(MC_SEQ_SUP_CNTL, 0x00000004);
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WREG32(MC_SEQ_SUP_CNTL, 0x00000001);
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/* wait for training to complete */
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while (!(RREG32(MC_IO_PAD_CNTL_D0) & MEM_FALL_OUT_CMD))
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udelay(10);
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if (running)
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WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
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}
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return 0;
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}
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int ni_init_microcode(struct radeon_device *rdev)
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{
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struct platform_device *pdev;
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const char *chip_name;
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const char *rlc_chip_name;
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size_t pfp_req_size, me_req_size, rlc_req_size, mc_req_size;
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char fw_name[30];
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int err;
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DRM_DEBUG("\n");
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pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0);
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err = IS_ERR(pdev);
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if (err) {
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printk(KERN_ERR "radeon_cp: Failed to register firmware\n");
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return -EINVAL;
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}
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switch (rdev->family) {
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case CHIP_BARTS:
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chip_name = "BARTS";
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rlc_chip_name = "BTC";
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break;
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case CHIP_TURKS:
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chip_name = "TURKS";
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rlc_chip_name = "BTC";
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break;
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case CHIP_CAICOS:
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chip_name = "CAICOS";
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rlc_chip_name = "BTC";
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break;
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default: BUG();
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}
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pfp_req_size = EVERGREEN_PFP_UCODE_SIZE * 4;
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me_req_size = EVERGREEN_PM4_UCODE_SIZE * 4;
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rlc_req_size = EVERGREEN_RLC_UCODE_SIZE * 4;
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mc_req_size = BTC_MC_UCODE_SIZE * 4;
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DRM_INFO("Loading %s Microcode\n", chip_name);
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snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
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err = request_firmware(&rdev->pfp_fw, fw_name, &pdev->dev);
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if (err)
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goto out;
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if (rdev->pfp_fw->size != pfp_req_size) {
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printk(KERN_ERR
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"ni_cp: Bogus length %zu in firmware \"%s\"\n",
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rdev->pfp_fw->size, fw_name);
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err = -EINVAL;
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goto out;
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}
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snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", chip_name);
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err = request_firmware(&rdev->me_fw, fw_name, &pdev->dev);
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if (err)
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goto out;
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if (rdev->me_fw->size != me_req_size) {
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printk(KERN_ERR
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"ni_cp: Bogus length %zu in firmware \"%s\"\n",
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rdev->me_fw->size, fw_name);
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err = -EINVAL;
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}
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snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", rlc_chip_name);
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err = request_firmware(&rdev->rlc_fw, fw_name, &pdev->dev);
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if (err)
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goto out;
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if (rdev->rlc_fw->size != rlc_req_size) {
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printk(KERN_ERR
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"ni_rlc: Bogus length %zu in firmware \"%s\"\n",
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rdev->rlc_fw->size, fw_name);
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err = -EINVAL;
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}
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snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
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err = request_firmware(&rdev->mc_fw, fw_name, &pdev->dev);
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if (err)
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goto out;
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if (rdev->mc_fw->size != mc_req_size) {
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printk(KERN_ERR
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"ni_mc: Bogus length %zu in firmware \"%s\"\n",
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rdev->mc_fw->size, fw_name);
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err = -EINVAL;
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}
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out:
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platform_device_unregister(pdev);
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if (err) {
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if (err != -EINVAL)
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printk(KERN_ERR
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"ni_cp: Failed to load firmware \"%s\"\n",
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fw_name);
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release_firmware(rdev->pfp_fw);
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rdev->pfp_fw = NULL;
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release_firmware(rdev->me_fw);
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rdev->me_fw = NULL;
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release_firmware(rdev->rlc_fw);
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rdev->rlc_fw = NULL;
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release_firmware(rdev->mc_fw);
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rdev->mc_fw = NULL;
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}
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return err;
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}
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