mirror of https://gitee.com/openkylin/linux.git
8fb59ce15c
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators * clk-nvidia: clk: tegra: fix old-style declaration clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 soc/tegra: fuse: Add runtime PM support soc/tegra: fuse: Clear fuse->clk on driver probe failure soc/tegra: pmc: Prevent racing with cpuilde driver soc/tegra: bpmp: Remove unused including <linux/version.h> * clk-rockchip: clk: rockchip: make rk3308 ddrphy4x clock critical clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema clk: rockchip: Add support for hclk_sfc on rk3036 clk: rockchip: rk3036: fix up the sclk_sfc parent error clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036 * clk-at91: clk: at91: clk-generated: Limit the requested rate to our range * clk-vc5: clk: vc5: Add properties for configuring SD/OE behavior clk: vc5: Use dev_err_probe dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| clk-cpu.c | ||
| clk-ddr.c | ||
| clk-half-divider.c | ||
| clk-inverter.c | ||
| clk-mmc-phase.c | ||
| clk-muxgrf.c | ||
| clk-pll.c | ||
| clk-px30.c | ||
| clk-rk3036.c | ||
| clk-rk3128.c | ||
| clk-rk3188.c | ||
| clk-rk3228.c | ||
| clk-rk3288.c | ||
| clk-rk3308.c | ||
| clk-rk3328.c | ||
| clk-rk3368.c | ||
| clk-rk3399.c | ||
| clk-rk3568.c | ||
| clk-rv1108.c | ||
| clk.c | ||
| clk.h | ||
| softrst.c | ||