mirror of https://gitee.com/openkylin/linux.git
542 lines
15 KiB
C
542 lines
15 KiB
C
/*
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* Copyright (c) 2005-2011 Atheros Communications Inc.
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* Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/etherdevice.h>
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#include "htt.h"
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#include "mac.h"
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#include "hif.h"
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#include "txrx.h"
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#include "debug.h"
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void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
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{
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htt->num_pending_tx--;
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if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
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ieee80211_wake_queues(htt->ar->hw);
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}
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static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
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{
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spin_lock_bh(&htt->tx_lock);
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__ath10k_htt_tx_dec_pending(htt);
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spin_unlock_bh(&htt->tx_lock);
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}
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static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
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{
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int ret = 0;
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spin_lock_bh(&htt->tx_lock);
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if (htt->num_pending_tx >= htt->max_num_pending_tx) {
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ret = -EBUSY;
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goto exit;
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}
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htt->num_pending_tx++;
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if (htt->num_pending_tx == htt->max_num_pending_tx)
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ieee80211_stop_queues(htt->ar->hw);
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exit:
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spin_unlock_bh(&htt->tx_lock);
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return ret;
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}
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int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
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{
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int msdu_id;
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lockdep_assert_held(&htt->tx_lock);
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msdu_id = find_first_zero_bit(htt->used_msdu_ids,
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htt->max_num_pending_tx);
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if (msdu_id == htt->max_num_pending_tx)
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return -ENOBUFS;
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ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
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__set_bit(msdu_id, htt->used_msdu_ids);
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return msdu_id;
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}
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void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
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{
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lockdep_assert_held(&htt->tx_lock);
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if (!test_bit(msdu_id, htt->used_msdu_ids))
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ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
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ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
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__clear_bit(msdu_id, htt->used_msdu_ids);
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}
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int ath10k_htt_tx_attach(struct ath10k_htt *htt)
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{
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spin_lock_init(&htt->tx_lock);
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init_waitqueue_head(&htt->empty_tx_wq);
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if (test_bit(ATH10K_FW_FEATURE_WMI_10X, htt->ar->fw_features))
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htt->max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
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else
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htt->max_num_pending_tx = TARGET_NUM_MSDU_DESC;
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ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
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htt->max_num_pending_tx);
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htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
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htt->max_num_pending_tx, GFP_KERNEL);
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if (!htt->pending_tx)
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return -ENOMEM;
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htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
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BITS_TO_LONGS(htt->max_num_pending_tx),
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GFP_KERNEL);
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if (!htt->used_msdu_ids) {
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kfree(htt->pending_tx);
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return -ENOMEM;
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}
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htt->tx_pool = dma_pool_create("ath10k htt tx pool", htt->ar->dev,
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sizeof(struct ath10k_htt_txbuf), 4, 0);
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if (!htt->tx_pool) {
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kfree(htt->used_msdu_ids);
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kfree(htt->pending_tx);
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return -ENOMEM;
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}
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return 0;
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}
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static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
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{
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struct htt_tx_done tx_done = {0};
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int msdu_id;
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spin_lock_bh(&htt->tx_lock);
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for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
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if (!test_bit(msdu_id, htt->used_msdu_ids))
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continue;
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ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
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msdu_id);
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tx_done.discard = 1;
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tx_done.msdu_id = msdu_id;
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ath10k_txrx_tx_unref(htt, &tx_done);
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}
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spin_unlock_bh(&htt->tx_lock);
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}
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void ath10k_htt_tx_detach(struct ath10k_htt *htt)
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{
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ath10k_htt_tx_cleanup_pending(htt);
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kfree(htt->pending_tx);
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kfree(htt->used_msdu_ids);
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dma_pool_destroy(htt->tx_pool);
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return;
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}
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void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
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{
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dev_kfree_skb_any(skb);
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}
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int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
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{
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struct sk_buff *skb;
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struct htt_cmd *cmd;
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int len = 0;
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int ret;
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len += sizeof(cmd->hdr);
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len += sizeof(cmd->ver_req);
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skb = ath10k_htc_alloc_skb(len);
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if (!skb)
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return -ENOMEM;
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skb_put(skb, len);
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cmd = (struct htt_cmd *)skb->data;
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cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;
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ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
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if (ret) {
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dev_kfree_skb_any(skb);
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return ret;
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}
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return 0;
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}
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int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
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{
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struct htt_stats_req *req;
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struct sk_buff *skb;
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struct htt_cmd *cmd;
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int len = 0, ret;
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len += sizeof(cmd->hdr);
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len += sizeof(cmd->stats_req);
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skb = ath10k_htc_alloc_skb(len);
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if (!skb)
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return -ENOMEM;
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skb_put(skb, len);
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cmd = (struct htt_cmd *)skb->data;
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cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ;
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req = &cmd->stats_req;
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memset(req, 0, sizeof(*req));
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/* currently we support only max 8 bit masks so no need to worry
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* about endian support */
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req->upload_types[0] = mask;
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req->reset_types[0] = mask;
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req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID;
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req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff);
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req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32);
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ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
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if (ret) {
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ath10k_warn("failed to send htt type stats request: %d", ret);
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dev_kfree_skb_any(skb);
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return ret;
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}
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return 0;
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}
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int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
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{
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struct sk_buff *skb;
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struct htt_cmd *cmd;
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struct htt_rx_ring_setup_ring *ring;
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const int num_rx_ring = 1;
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u16 flags;
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u32 fw_idx;
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int len;
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int ret;
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/*
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* the HW expects the buffer to be an integral number of 4-byte
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* "words"
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*/
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BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
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BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);
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len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
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+ (sizeof(*ring) * num_rx_ring);
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skb = ath10k_htc_alloc_skb(len);
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if (!skb)
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return -ENOMEM;
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skb_put(skb, len);
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cmd = (struct htt_cmd *)skb->data;
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ring = &cmd->rx_setup.rings[0];
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cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
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cmd->rx_setup.hdr.num_rings = 1;
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/* FIXME: do we need all of this? */
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flags = 0;
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flags |= HTT_RX_RING_FLAGS_MAC80211_HDR;
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flags |= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
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flags |= HTT_RX_RING_FLAGS_PPDU_START;
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flags |= HTT_RX_RING_FLAGS_PPDU_END;
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flags |= HTT_RX_RING_FLAGS_MPDU_START;
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flags |= HTT_RX_RING_FLAGS_MPDU_END;
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flags |= HTT_RX_RING_FLAGS_MSDU_START;
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flags |= HTT_RX_RING_FLAGS_MSDU_END;
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flags |= HTT_RX_RING_FLAGS_RX_ATTENTION;
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flags |= HTT_RX_RING_FLAGS_FRAG_INFO;
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flags |= HTT_RX_RING_FLAGS_UNICAST_RX;
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flags |= HTT_RX_RING_FLAGS_MULTICAST_RX;
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flags |= HTT_RX_RING_FLAGS_CTRL_RX;
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flags |= HTT_RX_RING_FLAGS_MGMT_RX;
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flags |= HTT_RX_RING_FLAGS_NULL_RX;
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flags |= HTT_RX_RING_FLAGS_PHY_DATA_RX;
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fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
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ring->fw_idx_shadow_reg_paddr =
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__cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
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ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
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ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
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ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
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ring->flags = __cpu_to_le16(flags);
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ring->fw_idx_init_val = __cpu_to_le16(fw_idx);
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#define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)
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ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
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ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
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ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
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ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
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ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
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ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
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ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
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ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
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ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
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ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
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#undef desc_offset
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ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
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if (ret) {
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dev_kfree_skb_any(skb);
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return ret;
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}
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return 0;
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}
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int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
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{
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struct device *dev = htt->ar->dev;
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struct sk_buff *txdesc = NULL;
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struct htt_cmd *cmd;
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struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
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u8 vdev_id = skb_cb->vdev_id;
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int len = 0;
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int msdu_id = -1;
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int res;
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res = ath10k_htt_tx_inc_pending(htt);
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if (res)
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goto err;
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len += sizeof(cmd->hdr);
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len += sizeof(cmd->mgmt_tx);
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spin_lock_bh(&htt->tx_lock);
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res = ath10k_htt_tx_alloc_msdu_id(htt);
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if (res < 0) {
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spin_unlock_bh(&htt->tx_lock);
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goto err_tx_dec;
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}
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msdu_id = res;
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htt->pending_tx[msdu_id] = msdu;
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spin_unlock_bh(&htt->tx_lock);
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txdesc = ath10k_htc_alloc_skb(len);
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if (!txdesc) {
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res = -ENOMEM;
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goto err_free_msdu_id;
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}
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skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len,
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DMA_TO_DEVICE);
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res = dma_mapping_error(dev, skb_cb->paddr);
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if (res)
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goto err_free_txdesc;
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skb_put(txdesc, len);
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cmd = (struct htt_cmd *)txdesc->data;
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cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_MGMT_TX;
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cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
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cmd->mgmt_tx.len = __cpu_to_le32(msdu->len);
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cmd->mgmt_tx.desc_id = __cpu_to_le32(msdu_id);
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cmd->mgmt_tx.vdev_id = __cpu_to_le32(vdev_id);
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memcpy(cmd->mgmt_tx.hdr, msdu->data,
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min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));
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skb_cb->htt.txbuf = NULL;
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res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
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if (res)
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goto err_unmap_msdu;
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return 0;
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err_unmap_msdu:
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dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
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err_free_txdesc:
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dev_kfree_skb_any(txdesc);
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err_free_msdu_id:
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spin_lock_bh(&htt->tx_lock);
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htt->pending_tx[msdu_id] = NULL;
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ath10k_htt_tx_free_msdu_id(htt, msdu_id);
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spin_unlock_bh(&htt->tx_lock);
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err_tx_dec:
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ath10k_htt_tx_dec_pending(htt);
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err:
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return res;
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}
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int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
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{
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struct device *dev = htt->ar->dev;
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
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struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
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struct ath10k_hif_sg_item sg_items[2];
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struct htt_data_tx_desc_frag *frags;
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u8 vdev_id = skb_cb->vdev_id;
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u8 tid = skb_cb->htt.tid;
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int prefetch_len;
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int res;
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u8 flags0 = 0;
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u16 msdu_id, flags1 = 0;
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dma_addr_t paddr;
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u32 frags_paddr;
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bool use_frags;
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res = ath10k_htt_tx_inc_pending(htt);
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if (res)
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goto err;
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spin_lock_bh(&htt->tx_lock);
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res = ath10k_htt_tx_alloc_msdu_id(htt);
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if (res < 0) {
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spin_unlock_bh(&htt->tx_lock);
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goto err_tx_dec;
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}
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msdu_id = res;
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htt->pending_tx[msdu_id] = msdu;
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spin_unlock_bh(&htt->tx_lock);
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prefetch_len = min(htt->prefetch_len, msdu->len);
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prefetch_len = roundup(prefetch_len, 4);
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/* Since HTT 3.0 there is no separate mgmt tx command. However in case
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* of mgmt tx using TX_FRM there is not tx fragment list. Instead of tx
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* fragment list host driver specifies directly frame pointer. */
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use_frags = htt->target_version_major < 3 ||
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!ieee80211_is_mgmt(hdr->frame_control);
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skb_cb->htt.txbuf = dma_pool_alloc(htt->tx_pool, GFP_ATOMIC,
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&paddr);
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if (!skb_cb->htt.txbuf)
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goto err_free_msdu_id;
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skb_cb->htt.txbuf_paddr = paddr;
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skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len,
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DMA_TO_DEVICE);
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res = dma_mapping_error(dev, skb_cb->paddr);
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if (res)
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goto err_free_txbuf;
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if (likely(use_frags)) {
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frags = skb_cb->htt.txbuf->frags;
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frags[0].paddr = __cpu_to_le32(skb_cb->paddr);
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frags[0].len = __cpu_to_le32(msdu->len);
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frags[1].paddr = 0;
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frags[1].len = 0;
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flags0 |= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
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HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
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frags_paddr = skb_cb->htt.txbuf_paddr;
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} else {
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flags0 |= SM(ATH10K_HW_TXRX_MGMT,
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HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
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frags_paddr = skb_cb->paddr;
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}
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/* Normally all commands go through HTC which manages tx credits for
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* each endpoint and notifies when tx is completed.
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*
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* HTT endpoint is creditless so there's no need to care about HTC
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* flags. In that case it is trivial to fill the HTC header here.
|
|
*
|
|
* MSDU transmission is considered completed upon HTT event. This
|
|
* implies no relevant resources can be freed until after the event is
|
|
* received. That's why HTC tx completion handler itself is ignored by
|
|
* setting NULL to transfer_context for all sg items.
|
|
*
|
|
* There is simply no point in pushing HTT TX_FRM through HTC tx path
|
|
* as it's a waste of resources. By bypassing HTC it is possible to
|
|
* avoid extra memory allocations, compress data structures and thus
|
|
* improve performance. */
|
|
|
|
skb_cb->htt.txbuf->htc_hdr.eid = htt->eid;
|
|
skb_cb->htt.txbuf->htc_hdr.len = __cpu_to_le16(
|
|
sizeof(skb_cb->htt.txbuf->cmd_hdr) +
|
|
sizeof(skb_cb->htt.txbuf->cmd_tx) +
|
|
prefetch_len);
|
|
skb_cb->htt.txbuf->htc_hdr.flags = 0;
|
|
|
|
if (!ieee80211_has_protected(hdr->frame_control))
|
|
flags0 |= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
|
|
|
|
flags0 |= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;
|
|
|
|
flags1 |= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
|
|
flags1 |= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
|
|
flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
|
|
flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;
|
|
|
|
skb_cb->htt.txbuf->cmd_hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM;
|
|
skb_cb->htt.txbuf->cmd_tx.flags0 = flags0;
|
|
skb_cb->htt.txbuf->cmd_tx.flags1 = __cpu_to_le16(flags1);
|
|
skb_cb->htt.txbuf->cmd_tx.len = __cpu_to_le16(msdu->len);
|
|
skb_cb->htt.txbuf->cmd_tx.id = __cpu_to_le16(msdu_id);
|
|
skb_cb->htt.txbuf->cmd_tx.frags_paddr = __cpu_to_le32(frags_paddr);
|
|
skb_cb->htt.txbuf->cmd_tx.peerid = __cpu_to_le32(HTT_INVALID_PEERID);
|
|
|
|
ath10k_dbg(ATH10K_DBG_HTT,
|
|
"htt tx flags0 %hhu flags1 %hu len %d id %hu frags_paddr %08x, msdu_paddr %08x vdev %hhu tid %hhu\n",
|
|
flags0, flags1, msdu->len, msdu_id, frags_paddr,
|
|
(u32)skb_cb->paddr, vdev_id, tid);
|
|
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt tx msdu: ",
|
|
msdu->data, msdu->len);
|
|
|
|
sg_items[0].transfer_id = 0;
|
|
sg_items[0].transfer_context = NULL;
|
|
sg_items[0].vaddr = &skb_cb->htt.txbuf->htc_hdr;
|
|
sg_items[0].paddr = skb_cb->htt.txbuf_paddr +
|
|
sizeof(skb_cb->htt.txbuf->frags);
|
|
sg_items[0].len = sizeof(skb_cb->htt.txbuf->htc_hdr) +
|
|
sizeof(skb_cb->htt.txbuf->cmd_hdr) +
|
|
sizeof(skb_cb->htt.txbuf->cmd_tx);
|
|
|
|
sg_items[1].transfer_id = 0;
|
|
sg_items[1].transfer_context = NULL;
|
|
sg_items[1].vaddr = msdu->data;
|
|
sg_items[1].paddr = skb_cb->paddr;
|
|
sg_items[1].len = prefetch_len;
|
|
|
|
res = ath10k_hif_tx_sg(htt->ar,
|
|
htt->ar->htc.endpoint[htt->eid].ul_pipe_id,
|
|
sg_items, ARRAY_SIZE(sg_items));
|
|
if (res)
|
|
goto err_unmap_msdu;
|
|
|
|
return 0;
|
|
|
|
err_unmap_msdu:
|
|
dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
|
|
err_free_txbuf:
|
|
dma_pool_free(htt->tx_pool,
|
|
skb_cb->htt.txbuf,
|
|
skb_cb->htt.txbuf_paddr);
|
|
err_free_msdu_id:
|
|
spin_lock_bh(&htt->tx_lock);
|
|
htt->pending_tx[msdu_id] = NULL;
|
|
ath10k_htt_tx_free_msdu_id(htt, msdu_id);
|
|
spin_unlock_bh(&htt->tx_lock);
|
|
err_tx_dec:
|
|
ath10k_htt_tx_dec_pending(htt);
|
|
err:
|
|
return res;
|
|
}
|