mirror of https://gitee.com/openkylin/linux.git
351 lines
6.1 KiB
ArmAsm
351 lines
6.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/linkage.h>
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#include <abi/entry.h>
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#include <abi/pgtable-bits.h>
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#include <asm/errno.h>
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#include <asm/setup.h>
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#include <asm/unistd.h>
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#include <asm/asm-offsets.h>
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#include <linux/threads.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/thread_info.h>
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#define PTE_INDX_MSK 0xffc
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#define PTE_INDX_SHIFT 10
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#define _PGDIR_SHIFT 22
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.macro zero_fp
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#ifdef CONFIG_STACKTRACE
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movi r8, 0
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#endif
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.endm
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.macro tlbop_begin name, val0, val1, val2
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ENTRY(csky_\name)
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mtcr a3, ss2
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mtcr r6, ss3
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mtcr a2, ss4
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RD_PGDR r6
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RD_MEH a3
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#ifdef CONFIG_CPU_HAS_TLBI
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tlbi.vaas a3
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sync.is
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btsti a3, 31
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bf 1f
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RD_PGDR_K r6
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1:
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#else
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bgeni a2, 31
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WR_MCIR a2
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bgeni a2, 25
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WR_MCIR a2
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#endif
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bclri r6, 0
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lrw a2, va_pa_offset
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ld.w a2, (a2, 0)
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subu r6, a2
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bseti r6, 31
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mov a2, a3
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lsri a2, _PGDIR_SHIFT
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lsli a2, 2
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addu r6, a2
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ldw r6, (r6)
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lrw a2, va_pa_offset
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ld.w a2, (a2, 0)
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subu r6, a2
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bseti r6, 31
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lsri a3, PTE_INDX_SHIFT
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lrw a2, PTE_INDX_MSK
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and a3, a2
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addu r6, a3
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ldw a3, (r6)
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movi a2, (_PAGE_PRESENT | \val0)
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and a3, a2
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cmpne a3, a2
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bt \name
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/* First read/write the page, just update the flags */
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ldw a3, (r6)
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bgeni a2, PAGE_VALID_BIT
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bseti a2, PAGE_ACCESSED_BIT
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bseti a2, \val1
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bseti a2, \val2
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or a3, a2
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stw a3, (r6)
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/* Some cpu tlb-hardrefill bypass the cache */
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#ifdef CONFIG_CPU_NEED_TLBSYNC
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movi a2, 0x22
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bseti a2, 6
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mtcr r6, cr22
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mtcr a2, cr17
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sync
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#endif
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mfcr a3, ss2
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mfcr r6, ss3
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mfcr a2, ss4
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rte
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\name:
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mfcr a3, ss2
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mfcr r6, ss3
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mfcr a2, ss4
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SAVE_ALL 0
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.endm
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.macro tlbop_end is_write
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zero_fp
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RD_MEH a2
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psrset ee, ie
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mov a0, sp
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movi a1, \is_write
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jbsr do_page_fault
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jmpi ret_from_exception
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.endm
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.text
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tlbop_begin tlbinvalidl, _PAGE_READ, PAGE_VALID_BIT, PAGE_ACCESSED_BIT
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tlbop_end 0
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tlbop_begin tlbinvalids, _PAGE_WRITE, PAGE_DIRTY_BIT, PAGE_MODIFIED_BIT
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tlbop_end 1
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tlbop_begin tlbmodified, _PAGE_WRITE, PAGE_DIRTY_BIT, PAGE_MODIFIED_BIT
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#ifndef CONFIG_CPU_HAS_LDSTEX
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jbsr csky_cmpxchg_fixup
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#endif
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tlbop_end 1
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ENTRY(csky_systemcall)
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SAVE_ALL TRAP0_SIZE
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zero_fp
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psrset ee, ie
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lrw r9, __NR_syscalls
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cmphs syscallid, r9 /* Check nr of syscall */
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bt 1f
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lrw r9, sys_call_table
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ixw r9, syscallid
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ldw syscallid, (r9)
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cmpnei syscallid, 0
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bf ret_from_exception
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mov r9, sp
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bmaski r10, THREAD_SHIFT
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andn r9, r10
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ldw r10, (r9, TINFO_FLAGS)
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lrw r9, _TIF_SYSCALL_WORK
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and r10, r9
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cmpnei r10, 0
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bt csky_syscall_trace
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#if defined(__CSKYABIV2__)
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subi sp, 8
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stw r5, (sp, 0x4)
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stw r4, (sp, 0x0)
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jsr syscallid /* Do system call */
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addi sp, 8
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#else
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jsr syscallid
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#endif
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stw a0, (sp, LSAVE_A0) /* Save return value */
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1:
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#ifdef CONFIG_DEBUG_RSEQ
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mov a0, sp
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jbsr rseq_syscall
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#endif
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jmpi ret_from_exception
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csky_syscall_trace:
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mov a0, sp /* sp = pt_regs pointer */
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jbsr syscall_trace_enter
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/* Prepare args before do system call */
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ldw a0, (sp, LSAVE_A0)
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ldw a1, (sp, LSAVE_A1)
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ldw a2, (sp, LSAVE_A2)
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ldw a3, (sp, LSAVE_A3)
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#if defined(__CSKYABIV2__)
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subi sp, 8
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ldw r9, (sp, LSAVE_A4)
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stw r9, (sp, 0x0)
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ldw r9, (sp, LSAVE_A5)
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stw r9, (sp, 0x4)
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jsr syscallid /* Do system call */
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addi sp, 8
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#else
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ldw r6, (sp, LSAVE_A4)
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ldw r7, (sp, LSAVE_A5)
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jsr syscallid /* Do system call */
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#endif
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stw a0, (sp, LSAVE_A0) /* Save return value */
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#ifdef CONFIG_DEBUG_RSEQ
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mov a0, sp
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jbsr rseq_syscall
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#endif
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mov a0, sp /* right now, sp --> pt_regs */
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jbsr syscall_trace_exit
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br ret_from_exception
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ENTRY(ret_from_kernel_thread)
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jbsr schedule_tail
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mov a0, r10
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jsr r9
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jbsr ret_from_exception
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ENTRY(ret_from_fork)
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jbsr schedule_tail
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mov r9, sp
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bmaski r10, THREAD_SHIFT
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andn r9, r10
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ldw r10, (r9, TINFO_FLAGS)
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lrw r9, _TIF_SYSCALL_WORK
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and r10, r9
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cmpnei r10, 0
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bf ret_from_exception
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mov a0, sp /* sp = pt_regs pointer */
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jbsr syscall_trace_exit
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ret_from_exception:
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psrclr ie
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ld r9, (sp, LSAVE_PSR)
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btsti r9, 31
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bt 1f
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/*
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* Load address of current->thread_info, Then get address of task_struct
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* Get task_needreshed in task_struct
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*/
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mov r9, sp
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bmaski r10, THREAD_SHIFT
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andn r9, r10
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ldw r10, (r9, TINFO_FLAGS)
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lrw r9, _TIF_WORK_MASK
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and r10, r9
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cmpnei r10, 0
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bt exit_work
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1:
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#ifdef CONFIG_PREEMPTION
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mov r9, sp
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bmaski r10, THREAD_SHIFT
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andn r9, r10
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ldw r10, (r9, TINFO_PREEMPT)
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cmpnei r10, 0
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bt 2f
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jbsr preempt_schedule_irq /* irq en/disable is done inside */
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2:
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#endif
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#ifdef CONFIG_TRACE_IRQFLAGS
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ld r10, (sp, LSAVE_PSR)
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btsti r10, 6
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bf 2f
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jbsr trace_hardirqs_on
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2:
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#endif
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RESTORE_ALL
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exit_work:
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lrw r9, ret_from_exception
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mov lr, r9
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btsti r10, TIF_NEED_RESCHED
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bt work_resched
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psrset ie
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mov a0, sp
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mov a1, r10
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jmpi do_notify_resume
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work_resched:
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jmpi schedule
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ENTRY(csky_trap)
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SAVE_ALL 0
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zero_fp
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psrset ee
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mov a0, sp /* Push Stack pointer arg */
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jbsr trap_c /* Call C-level trap handler */
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jmpi ret_from_exception
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/*
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* Prototype from libc for abiv1:
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* register unsigned int __result asm("a0");
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* asm( "trap 3" :"=r"(__result)::);
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*/
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ENTRY(csky_get_tls)
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USPTOKSP
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/* increase epc for continue */
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mfcr a0, epc
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addi a0, TRAP0_SIZE
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mtcr a0, epc
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/* get current task thread_info with kernel 8K stack */
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bmaski a0, THREAD_SHIFT
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not a0
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subi sp, 1
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and a0, sp
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addi sp, 1
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/* get tls */
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ldw a0, (a0, TINFO_TP_VALUE)
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KSPTOUSP
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rte
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ENTRY(csky_irq)
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SAVE_ALL 0
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zero_fp
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psrset ee
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#ifdef CONFIG_TRACE_IRQFLAGS
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jbsr trace_hardirqs_off
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#endif
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mov a0, sp
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jbsr csky_do_IRQ
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jmpi ret_from_exception
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/*
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* a0 = prev task_struct *
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* a1 = next task_struct *
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* a0 = return next
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*/
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ENTRY(__switch_to)
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lrw a3, TASK_THREAD
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addu a3, a0
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SAVE_SWITCH_STACK
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stw sp, (a3, THREAD_KSP)
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/* Set up next process to run */
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lrw a3, TASK_THREAD
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addu a3, a1
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ldw sp, (a3, THREAD_KSP) /* Set next kernel sp */
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#if defined(__CSKYABIV2__)
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addi a3, a1, TASK_THREAD_INFO
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ldw tls, (a3, TINFO_TP_VALUE)
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#endif
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RESTORE_SWITCH_STACK
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rts
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ENDPROC(__switch_to)
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