mirror of https://gitee.com/openkylin/linux.git
114 lines
2.7 KiB
C
114 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2018, The Linux Foundation. All rights reserved.
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/regmap.h>
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#include "clk-regmap.h"
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#include "clk-hfpll.h"
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static const struct hfpll_data hdata = {
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.mode_reg = 0x00,
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.l_reg = 0x04,
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.m_reg = 0x08,
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.n_reg = 0x0c,
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.user_reg = 0x10,
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.config_reg = 0x14,
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.config_val = 0x430405d,
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.status_reg = 0x1c,
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.lock_bit = 16,
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.user_val = 0x8,
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.user_vco_mask = 0x100000,
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.low_vco_max_rate = 1248000000,
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.min_rate = 537600000UL,
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.max_rate = 2900000000UL,
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};
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static const struct of_device_id qcom_hfpll_match_table[] = {
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{ .compatible = "qcom,hfpll" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);
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static const struct regmap_config hfpll_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = 0x30,
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.fast_io = true,
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};
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static int qcom_hfpll_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct device *dev = &pdev->dev;
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void __iomem *base;
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struct regmap *regmap;
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struct clk_hfpll *h;
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struct clk_init_data init = {
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.num_parents = 1,
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.ops = &clk_ops_hfpll,
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/*
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* rather than marking the clock critical and forcing the clock
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* to be always enabled, we make sure that the clock is not
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* disabled: the firmware remains responsible of enabling this
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* clock (for more info check the commit log)
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*/
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.flags = CLK_IGNORE_UNUSED,
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};
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int ret;
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struct clk_parent_data pdata = { .index = 0 };
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h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
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if (!h)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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regmap = devm_regmap_init_mmio(&pdev->dev, base, &hfpll_regmap_config);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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if (of_property_read_string_index(dev->of_node, "clock-output-names",
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0, &init.name))
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return -ENODEV;
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init.parent_data = &pdata;
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h->d = &hdata;
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h->clkr.hw.init = &init;
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spin_lock_init(&h->lock);
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ret = devm_clk_register_regmap(dev, &h->clkr);
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if (ret) {
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dev_err(dev, "failed to register regmap clock: %d\n", ret);
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return ret;
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
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&h->clkr.hw);
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}
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static struct platform_driver qcom_hfpll_driver = {
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.probe = qcom_hfpll_probe,
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.driver = {
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.name = "qcom-hfpll",
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.of_match_table = qcom_hfpll_match_table,
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},
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};
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module_platform_driver(qcom_hfpll_driver);
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MODULE_DESCRIPTION("QCOM HFPLL Clock Driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:qcom-hfpll");
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