mirror of https://gitee.com/openkylin/linux.git
728 lines
19 KiB
C
728 lines
19 KiB
C
/*
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* SGI NMI support routines
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Copyright (c) 2009-2013 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (c) Mike Travis
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*/
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#include <linux/cpu.h>
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#include <linux/delay.h>
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#include <linux/kdb.h>
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#include <linux/kexec.h>
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#include <linux/kgdb.h>
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#include <linux/module.h>
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#include <linux/nmi.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <asm/apic.h>
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#include <asm/current.h>
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#include <asm/kdebug.h>
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#include <asm/local64.h>
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#include <asm/nmi.h>
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#include <asm/traps.h>
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#include <asm/uv/uv.h>
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#include <asm/uv/uv_hub.h>
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#include <asm/uv/uv_mmrs.h>
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/*
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* UV handler for NMI
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*
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* Handle system-wide NMI events generated by the global 'power nmi' command.
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*
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* Basic operation is to field the NMI interrupt on each cpu and wait
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* until all cpus have arrived into the nmi handler. If some cpus do not
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* make it into the handler, try and force them in with the IPI(NMI) signal.
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*
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* We also have to lessen UV Hub MMR accesses as much as possible as this
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* disrupts the UV Hub's primary mission of directing NumaLink traffic and
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* can cause system problems to occur.
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*
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* To do this we register our primary NMI notifier on the NMI_UNKNOWN
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* chain. This reduces the number of false NMI calls when the perf
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* tools are running which generate an enormous number of NMIs per
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* second (~4M/s for 1024 cpu threads). Our secondary NMI handler is
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* very short as it only checks that if it has been "pinged" with the
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* IPI(NMI) signal as mentioned above, and does not read the UV Hub's MMR.
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*
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*/
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static struct uv_hub_nmi_s **uv_hub_nmi_list;
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DEFINE_PER_CPU(struct uv_cpu_nmi_s, __uv_cpu_nmi);
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EXPORT_PER_CPU_SYMBOL_GPL(__uv_cpu_nmi);
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static unsigned long nmi_mmr;
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static unsigned long nmi_mmr_clear;
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static unsigned long nmi_mmr_pending;
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static atomic_t uv_in_nmi;
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static atomic_t uv_nmi_cpu = ATOMIC_INIT(-1);
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static atomic_t uv_nmi_cpus_in_nmi = ATOMIC_INIT(-1);
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static atomic_t uv_nmi_slave_continue;
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static cpumask_var_t uv_nmi_cpu_mask;
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/* Values for uv_nmi_slave_continue */
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#define SLAVE_CLEAR 0
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#define SLAVE_CONTINUE 1
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#define SLAVE_EXIT 2
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/*
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* Default is all stack dumps go to the console and buffer.
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* Lower level to send to log buffer only.
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*/
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static int uv_nmi_loglevel = CONSOLE_LOGLEVEL_DEFAULT;
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module_param_named(dump_loglevel, uv_nmi_loglevel, int, 0644);
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/*
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* The following values show statistics on how perf events are affecting
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* this system.
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*/
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static int param_get_local64(char *buffer, const struct kernel_param *kp)
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{
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return sprintf(buffer, "%lu\n", local64_read((local64_t *)kp->arg));
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}
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static int param_set_local64(const char *val, const struct kernel_param *kp)
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{
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/* clear on any write */
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local64_set((local64_t *)kp->arg, 0);
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return 0;
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}
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static struct kernel_param_ops param_ops_local64 = {
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.get = param_get_local64,
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.set = param_set_local64,
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};
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#define param_check_local64(name, p) __param_check(name, p, local64_t)
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static local64_t uv_nmi_count;
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module_param_named(nmi_count, uv_nmi_count, local64, 0644);
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static local64_t uv_nmi_misses;
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module_param_named(nmi_misses, uv_nmi_misses, local64, 0644);
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static local64_t uv_nmi_ping_count;
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module_param_named(ping_count, uv_nmi_ping_count, local64, 0644);
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static local64_t uv_nmi_ping_misses;
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module_param_named(ping_misses, uv_nmi_ping_misses, local64, 0644);
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/*
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* Following values allow tuning for large systems under heavy loading
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*/
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static int uv_nmi_initial_delay = 100;
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module_param_named(initial_delay, uv_nmi_initial_delay, int, 0644);
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static int uv_nmi_slave_delay = 100;
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module_param_named(slave_delay, uv_nmi_slave_delay, int, 0644);
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static int uv_nmi_loop_delay = 100;
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module_param_named(loop_delay, uv_nmi_loop_delay, int, 0644);
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static int uv_nmi_trigger_delay = 10000;
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module_param_named(trigger_delay, uv_nmi_trigger_delay, int, 0644);
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static int uv_nmi_wait_count = 100;
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module_param_named(wait_count, uv_nmi_wait_count, int, 0644);
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static int uv_nmi_retry_count = 500;
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module_param_named(retry_count, uv_nmi_retry_count, int, 0644);
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/*
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* Valid NMI Actions:
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* "dump" - dump process stack for each cpu
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* "ips" - dump IP info for each cpu
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* "kdump" - do crash dump
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* "kdb" - enter KDB (default)
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* "kgdb" - enter KGDB
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*/
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static char uv_nmi_action[8] = "kdb";
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module_param_string(action, uv_nmi_action, sizeof(uv_nmi_action), 0644);
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static inline bool uv_nmi_action_is(const char *action)
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{
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return (strncmp(uv_nmi_action, action, strlen(action)) == 0);
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}
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/* Setup which NMI support is present in system */
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static void uv_nmi_setup_mmrs(void)
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{
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if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
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uv_write_local_mmr(UVH_NMI_MMRX_REQ,
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1UL << UVH_NMI_MMRX_REQ_SHIFT);
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nmi_mmr = UVH_NMI_MMRX;
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nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
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nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
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pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
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} else {
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nmi_mmr = UVH_NMI_MMR;
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nmi_mmr_clear = UVH_NMI_MMR_CLEAR;
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nmi_mmr_pending = 1UL << UVH_NMI_MMR_SHIFT;
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pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMR_TYPE);
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}
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}
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/* Read NMI MMR and check if NMI flag was set by BMC. */
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static inline int uv_nmi_test_mmr(struct uv_hub_nmi_s *hub_nmi)
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{
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hub_nmi->nmi_value = uv_read_local_mmr(nmi_mmr);
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atomic_inc(&hub_nmi->read_mmr_count);
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return !!(hub_nmi->nmi_value & nmi_mmr_pending);
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}
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static inline void uv_local_mmr_clear_nmi(void)
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{
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uv_write_local_mmr(nmi_mmr_clear, nmi_mmr_pending);
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}
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/*
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* If first cpu in on this hub, set hub_nmi "in_nmi" and "owner" values and
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* return true. If first cpu in on the system, set global "in_nmi" flag.
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*/
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static int uv_set_in_nmi(int cpu, struct uv_hub_nmi_s *hub_nmi)
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{
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int first = atomic_add_unless(&hub_nmi->in_nmi, 1, 1);
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if (first) {
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atomic_set(&hub_nmi->cpu_owner, cpu);
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if (atomic_add_unless(&uv_in_nmi, 1, 1))
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atomic_set(&uv_nmi_cpu, cpu);
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atomic_inc(&hub_nmi->nmi_count);
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}
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return first;
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}
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/* Check if this is a system NMI event */
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static int uv_check_nmi(struct uv_hub_nmi_s *hub_nmi)
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{
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int cpu = smp_processor_id();
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int nmi = 0;
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local64_inc(&uv_nmi_count);
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uv_cpu_nmi.queries++;
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do {
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nmi = atomic_read(&hub_nmi->in_nmi);
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if (nmi)
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break;
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if (raw_spin_trylock(&hub_nmi->nmi_lock)) {
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/* check hub MMR NMI flag */
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if (uv_nmi_test_mmr(hub_nmi)) {
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uv_set_in_nmi(cpu, hub_nmi);
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nmi = 1;
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break;
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}
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/* MMR NMI flag is clear */
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raw_spin_unlock(&hub_nmi->nmi_lock);
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} else {
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/* wait a moment for the hub nmi locker to set flag */
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cpu_relax();
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udelay(uv_nmi_slave_delay);
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/* re-check hub in_nmi flag */
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nmi = atomic_read(&hub_nmi->in_nmi);
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if (nmi)
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break;
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}
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/* check if this BMC missed setting the MMR NMI flag */
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if (!nmi) {
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nmi = atomic_read(&uv_in_nmi);
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if (nmi)
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uv_set_in_nmi(cpu, hub_nmi);
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}
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} while (0);
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if (!nmi)
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local64_inc(&uv_nmi_misses);
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return nmi;
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}
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/* Need to reset the NMI MMR register, but only once per hub. */
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static inline void uv_clear_nmi(int cpu)
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{
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struct uv_hub_nmi_s *hub_nmi = uv_hub_nmi;
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if (cpu == atomic_read(&hub_nmi->cpu_owner)) {
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atomic_set(&hub_nmi->cpu_owner, -1);
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atomic_set(&hub_nmi->in_nmi, 0);
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uv_local_mmr_clear_nmi();
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raw_spin_unlock(&hub_nmi->nmi_lock);
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}
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}
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/* Print non-responding cpus */
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static void uv_nmi_nr_cpus_pr(char *fmt)
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{
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static char cpu_list[1024];
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int len = sizeof(cpu_list);
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int c = cpumask_weight(uv_nmi_cpu_mask);
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int n = cpulist_scnprintf(cpu_list, len, uv_nmi_cpu_mask);
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if (n >= len-1)
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strcpy(&cpu_list[len - 6], "...\n");
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printk(fmt, c, cpu_list);
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}
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/* Ping non-responding cpus attemping to force them into the NMI handler */
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static void uv_nmi_nr_cpus_ping(void)
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{
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int cpu;
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for_each_cpu(cpu, uv_nmi_cpu_mask)
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atomic_set(&uv_cpu_nmi_per(cpu).pinging, 1);
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apic->send_IPI_mask(uv_nmi_cpu_mask, APIC_DM_NMI);
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}
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/* Clean up flags for cpus that ignored both NMI and ping */
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static void uv_nmi_cleanup_mask(void)
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{
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int cpu;
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for_each_cpu(cpu, uv_nmi_cpu_mask) {
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atomic_set(&uv_cpu_nmi_per(cpu).pinging, 0);
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atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_OUT);
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cpumask_clear_cpu(cpu, uv_nmi_cpu_mask);
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}
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}
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/* Loop waiting as cpus enter nmi handler */
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static int uv_nmi_wait_cpus(int first)
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{
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int i, j, k, n = num_online_cpus();
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int last_k = 0, waiting = 0;
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if (first) {
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cpumask_copy(uv_nmi_cpu_mask, cpu_online_mask);
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k = 0;
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} else {
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k = n - cpumask_weight(uv_nmi_cpu_mask);
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}
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udelay(uv_nmi_initial_delay);
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for (i = 0; i < uv_nmi_retry_count; i++) {
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int loop_delay = uv_nmi_loop_delay;
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for_each_cpu(j, uv_nmi_cpu_mask) {
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if (atomic_read(&uv_cpu_nmi_per(j).state)) {
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cpumask_clear_cpu(j, uv_nmi_cpu_mask);
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if (++k >= n)
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break;
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}
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}
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if (k >= n) { /* all in? */
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k = n;
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break;
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}
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if (last_k != k) { /* abort if no new cpus coming in */
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last_k = k;
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waiting = 0;
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} else if (++waiting > uv_nmi_wait_count)
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break;
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/* extend delay if waiting only for cpu 0 */
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if (waiting && (n - k) == 1 &&
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cpumask_test_cpu(0, uv_nmi_cpu_mask))
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loop_delay *= 100;
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udelay(loop_delay);
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}
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atomic_set(&uv_nmi_cpus_in_nmi, k);
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return n - k;
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}
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/* Wait until all slave cpus have entered UV NMI handler */
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static void uv_nmi_wait(int master)
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{
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/* indicate this cpu is in */
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atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_IN);
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/* if not the first cpu in (the master), then we are a slave cpu */
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if (!master)
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return;
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do {
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/* wait for all other cpus to gather here */
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if (!uv_nmi_wait_cpus(1))
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break;
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/* if not all made it in, send IPI NMI to them */
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uv_nmi_nr_cpus_pr(KERN_ALERT
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"UV: Sending NMI IPI to %d non-responding CPUs: %s\n");
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uv_nmi_nr_cpus_ping();
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/* if all cpus are in, then done */
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if (!uv_nmi_wait_cpus(0))
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break;
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uv_nmi_nr_cpus_pr(KERN_ALERT
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"UV: %d CPUs not in NMI loop: %s\n");
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} while (0);
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pr_alert("UV: %d of %d CPUs in NMI\n",
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atomic_read(&uv_nmi_cpus_in_nmi), num_online_cpus());
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}
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static void uv_nmi_dump_cpu_ip_hdr(void)
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{
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printk(KERN_DEFAULT
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"\nUV: %4s %6s %-32s %s (Note: PID 0 not listed)\n",
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"CPU", "PID", "COMMAND", "IP");
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}
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static void uv_nmi_dump_cpu_ip(int cpu, struct pt_regs *regs)
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{
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printk(KERN_DEFAULT "UV: %4d %6d %-32.32s ",
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cpu, current->pid, current->comm);
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printk_address(regs->ip);
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}
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/* Dump this cpu's state */
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static void uv_nmi_dump_state_cpu(int cpu, struct pt_regs *regs)
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{
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const char *dots = " ................................. ";
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if (uv_nmi_action_is("ips")) {
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if (cpu == 0)
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uv_nmi_dump_cpu_ip_hdr();
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if (current->pid != 0)
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uv_nmi_dump_cpu_ip(cpu, regs);
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} else if (uv_nmi_action_is("dump")) {
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printk(KERN_DEFAULT
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"UV:%sNMI process trace for CPU %d\n", dots, cpu);
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show_regs(regs);
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}
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atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_DUMP_DONE);
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}
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/* Trigger a slave cpu to dump it's state */
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static void uv_nmi_trigger_dump(int cpu)
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{
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int retry = uv_nmi_trigger_delay;
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if (atomic_read(&uv_cpu_nmi_per(cpu).state) != UV_NMI_STATE_IN)
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return;
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atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_DUMP);
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do {
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cpu_relax();
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udelay(10);
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if (atomic_read(&uv_cpu_nmi_per(cpu).state)
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!= UV_NMI_STATE_DUMP)
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return;
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} while (--retry > 0);
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pr_crit("UV: CPU %d stuck in process dump function\n", cpu);
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atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_DUMP_DONE);
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}
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/* Wait until all cpus ready to exit */
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static void uv_nmi_sync_exit(int master)
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{
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atomic_dec(&uv_nmi_cpus_in_nmi);
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if (master) {
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while (atomic_read(&uv_nmi_cpus_in_nmi) > 0)
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cpu_relax();
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atomic_set(&uv_nmi_slave_continue, SLAVE_CLEAR);
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} else {
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while (atomic_read(&uv_nmi_slave_continue))
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cpu_relax();
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}
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}
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/* Walk through cpu list and dump state of each */
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static void uv_nmi_dump_state(int cpu, struct pt_regs *regs, int master)
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{
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if (master) {
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int tcpu;
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int ignored = 0;
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int saved_console_loglevel = console_loglevel;
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pr_alert("UV: tracing %s for %d CPUs from CPU %d\n",
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uv_nmi_action_is("ips") ? "IPs" : "processes",
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atomic_read(&uv_nmi_cpus_in_nmi), cpu);
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console_loglevel = uv_nmi_loglevel;
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atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
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for_each_online_cpu(tcpu) {
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if (cpumask_test_cpu(tcpu, uv_nmi_cpu_mask))
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ignored++;
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else if (tcpu == cpu)
|
|
uv_nmi_dump_state_cpu(tcpu, regs);
|
|
else
|
|
uv_nmi_trigger_dump(tcpu);
|
|
}
|
|
if (ignored)
|
|
printk(KERN_DEFAULT "UV: %d CPUs ignored NMI\n",
|
|
ignored);
|
|
|
|
console_loglevel = saved_console_loglevel;
|
|
pr_alert("UV: process trace complete\n");
|
|
} else {
|
|
while (!atomic_read(&uv_nmi_slave_continue))
|
|
cpu_relax();
|
|
while (atomic_read(&uv_cpu_nmi.state) != UV_NMI_STATE_DUMP)
|
|
cpu_relax();
|
|
uv_nmi_dump_state_cpu(cpu, regs);
|
|
}
|
|
uv_nmi_sync_exit(master);
|
|
}
|
|
|
|
static void uv_nmi_touch_watchdogs(void)
|
|
{
|
|
touch_softlockup_watchdog_sync();
|
|
clocksource_touch_watchdog();
|
|
rcu_cpu_stall_reset();
|
|
touch_nmi_watchdog();
|
|
}
|
|
|
|
#if defined(CONFIG_KEXEC)
|
|
static atomic_t uv_nmi_kexec_failed;
|
|
static void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
|
|
{
|
|
/* Call crash to dump system state */
|
|
if (master) {
|
|
pr_emerg("UV: NMI executing crash_kexec on CPU%d\n", cpu);
|
|
crash_kexec(regs);
|
|
|
|
pr_emerg("UV: crash_kexec unexpectedly returned, ");
|
|
if (!kexec_crash_image) {
|
|
pr_cont("crash kernel not loaded\n");
|
|
atomic_set(&uv_nmi_kexec_failed, 1);
|
|
uv_nmi_sync_exit(1);
|
|
return;
|
|
}
|
|
pr_cont("kexec busy, stalling cpus while waiting\n");
|
|
}
|
|
|
|
/* If crash exec fails the slaves should return, otherwise stall */
|
|
while (atomic_read(&uv_nmi_kexec_failed) == 0)
|
|
mdelay(10);
|
|
|
|
/* Crash kernel most likely not loaded, return in an orderly fashion */
|
|
uv_nmi_sync_exit(0);
|
|
}
|
|
|
|
#else /* !CONFIG_KEXEC */
|
|
static inline void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
|
|
{
|
|
if (master)
|
|
pr_err("UV: NMI kdump: KEXEC not supported in this kernel\n");
|
|
}
|
|
#endif /* !CONFIG_KEXEC */
|
|
|
|
#ifdef CONFIG_KGDB
|
|
#ifdef CONFIG_KGDB_KDB
|
|
static inline int uv_nmi_kdb_reason(void)
|
|
{
|
|
return KDB_REASON_SYSTEM_NMI;
|
|
}
|
|
#else /* !CONFIG_KGDB_KDB */
|
|
static inline int uv_nmi_kdb_reason(void)
|
|
{
|
|
/* Insure user is expecting to attach gdb remote */
|
|
if (uv_nmi_action_is("kgdb"))
|
|
return 0;
|
|
|
|
pr_err("UV: NMI error: KDB is not enabled in this kernel\n");
|
|
return -1;
|
|
}
|
|
#endif /* CONFIG_KGDB_KDB */
|
|
|
|
/*
|
|
* Call KGDB/KDB from NMI handler
|
|
*
|
|
* Note that if both KGDB and KDB are configured, then the action of 'kgdb' or
|
|
* 'kdb' has no affect on which is used. See the KGDB documention for further
|
|
* information.
|
|
*/
|
|
static void uv_call_kgdb_kdb(int cpu, struct pt_regs *regs, int master)
|
|
{
|
|
if (master) {
|
|
int reason = uv_nmi_kdb_reason();
|
|
int ret;
|
|
|
|
if (reason < 0)
|
|
return;
|
|
|
|
/* call KGDB NMI handler as MASTER */
|
|
ret = kgdb_nmicallin(cpu, X86_TRAP_NMI, regs, reason,
|
|
&uv_nmi_slave_continue);
|
|
if (ret) {
|
|
pr_alert("KGDB returned error, is kgdboc set?\n");
|
|
atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
|
|
}
|
|
} else {
|
|
/* wait for KGDB signal that it's ready for slaves to enter */
|
|
int sig;
|
|
|
|
do {
|
|
cpu_relax();
|
|
sig = atomic_read(&uv_nmi_slave_continue);
|
|
} while (!sig);
|
|
|
|
/* call KGDB as slave */
|
|
if (sig == SLAVE_CONTINUE)
|
|
kgdb_nmicallback(cpu, regs);
|
|
}
|
|
uv_nmi_sync_exit(master);
|
|
}
|
|
|
|
#else /* !CONFIG_KGDB */
|
|
static inline void uv_call_kgdb_kdb(int cpu, struct pt_regs *regs, int master)
|
|
{
|
|
pr_err("UV: NMI error: KGDB is not enabled in this kernel\n");
|
|
}
|
|
#endif /* !CONFIG_KGDB */
|
|
|
|
/*
|
|
* UV NMI handler
|
|
*/
|
|
int uv_handle_nmi(unsigned int reason, struct pt_regs *regs)
|
|
{
|
|
struct uv_hub_nmi_s *hub_nmi = uv_hub_nmi;
|
|
int cpu = smp_processor_id();
|
|
int master = 0;
|
|
unsigned long flags;
|
|
|
|
local_irq_save(flags);
|
|
|
|
/* If not a UV System NMI, ignore */
|
|
if (!atomic_read(&uv_cpu_nmi.pinging) && !uv_check_nmi(hub_nmi)) {
|
|
local_irq_restore(flags);
|
|
return NMI_DONE;
|
|
}
|
|
|
|
/* Indicate we are the first CPU into the NMI handler */
|
|
master = (atomic_read(&uv_nmi_cpu) == cpu);
|
|
|
|
/* If NMI action is "kdump", then attempt to do it */
|
|
if (uv_nmi_action_is("kdump"))
|
|
uv_nmi_kdump(cpu, master, regs);
|
|
|
|
/* Pause as all cpus enter the NMI handler */
|
|
uv_nmi_wait(master);
|
|
|
|
/* Dump state of each cpu */
|
|
if (uv_nmi_action_is("ips") || uv_nmi_action_is("dump"))
|
|
uv_nmi_dump_state(cpu, regs, master);
|
|
|
|
/* Call KGDB/KDB if enabled */
|
|
else if (uv_nmi_action_is("kdb") || uv_nmi_action_is("kgdb"))
|
|
uv_call_kgdb_kdb(cpu, regs, master);
|
|
|
|
/* Clear per_cpu "in nmi" flag */
|
|
atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_OUT);
|
|
|
|
/* Clear MMR NMI flag on each hub */
|
|
uv_clear_nmi(cpu);
|
|
|
|
/* Clear global flags */
|
|
if (master) {
|
|
if (cpumask_weight(uv_nmi_cpu_mask))
|
|
uv_nmi_cleanup_mask();
|
|
atomic_set(&uv_nmi_cpus_in_nmi, -1);
|
|
atomic_set(&uv_nmi_cpu, -1);
|
|
atomic_set(&uv_in_nmi, 0);
|
|
}
|
|
|
|
uv_nmi_touch_watchdogs();
|
|
local_irq_restore(flags);
|
|
|
|
return NMI_HANDLED;
|
|
}
|
|
|
|
/*
|
|
* NMI handler for pulling in CPUs when perf events are grabbing our NMI
|
|
*/
|
|
static int uv_handle_nmi_ping(unsigned int reason, struct pt_regs *regs)
|
|
{
|
|
int ret;
|
|
|
|
uv_cpu_nmi.queries++;
|
|
if (!atomic_read(&uv_cpu_nmi.pinging)) {
|
|
local64_inc(&uv_nmi_ping_misses);
|
|
return NMI_DONE;
|
|
}
|
|
|
|
uv_cpu_nmi.pings++;
|
|
local64_inc(&uv_nmi_ping_count);
|
|
ret = uv_handle_nmi(reason, regs);
|
|
atomic_set(&uv_cpu_nmi.pinging, 0);
|
|
return ret;
|
|
}
|
|
|
|
static void uv_register_nmi_notifier(void)
|
|
{
|
|
if (register_nmi_handler(NMI_UNKNOWN, uv_handle_nmi, 0, "uv"))
|
|
pr_warn("UV: NMI handler failed to register\n");
|
|
|
|
if (register_nmi_handler(NMI_LOCAL, uv_handle_nmi_ping, 0, "uvping"))
|
|
pr_warn("UV: PING NMI handler failed to register\n");
|
|
}
|
|
|
|
void uv_nmi_init(void)
|
|
{
|
|
unsigned int value;
|
|
|
|
/*
|
|
* Unmask NMI on all cpus
|
|
*/
|
|
value = apic_read(APIC_LVT1) | APIC_DM_NMI;
|
|
value &= ~APIC_LVT_MASKED;
|
|
apic_write(APIC_LVT1, value);
|
|
}
|
|
|
|
void uv_nmi_setup(void)
|
|
{
|
|
int size = sizeof(void *) * (1 << NODES_SHIFT);
|
|
int cpu, nid;
|
|
|
|
/* Setup hub nmi info */
|
|
uv_nmi_setup_mmrs();
|
|
uv_hub_nmi_list = kzalloc(size, GFP_KERNEL);
|
|
pr_info("UV: NMI hub list @ 0x%p (%d)\n", uv_hub_nmi_list, size);
|
|
BUG_ON(!uv_hub_nmi_list);
|
|
size = sizeof(struct uv_hub_nmi_s);
|
|
for_each_present_cpu(cpu) {
|
|
nid = cpu_to_node(cpu);
|
|
if (uv_hub_nmi_list[nid] == NULL) {
|
|
uv_hub_nmi_list[nid] = kzalloc_node(size,
|
|
GFP_KERNEL, nid);
|
|
BUG_ON(!uv_hub_nmi_list[nid]);
|
|
raw_spin_lock_init(&(uv_hub_nmi_list[nid]->nmi_lock));
|
|
atomic_set(&uv_hub_nmi_list[nid]->cpu_owner, -1);
|
|
}
|
|
uv_hub_nmi_per(cpu) = uv_hub_nmi_list[nid];
|
|
}
|
|
BUG_ON(!alloc_cpumask_var(&uv_nmi_cpu_mask, GFP_KERNEL));
|
|
uv_register_nmi_notifier();
|
|
}
|