linux/arch/arm64/kvm/hyp
Marc Zyngier 94d0e5980d arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a single CPU
Architecturally, TLBs are private to the (physical) CPU they're
associated with. But when multiple vcpus from the same VM are
being multiplexed on the same CPU, the TLBs are not private
to the vcpus (and are actually shared across the VMID).

Let's consider the following scenario:

- vcpu-0 maps PA to VA
- vcpu-1 maps PA' to VA

If run on the same physical CPU, vcpu-1 can hit TLB entries generated
by vcpu-0 accesses, and access the wrong physical page.

The solution to this is to keep a per-VM map of which vcpu ran last
on each given physical CPU, and invalidate local TLBs when switching
to a different vcpu from the same VM.

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-11-04 17:56:28 +00:00
..
Makefile arm64: KVM: Move vgic-v3 save/restore to virt/kvm/arm/hyp 2016-09-22 13:21:46 +02:00
debug-sr.c KVM: arm/arm64: Get rid of exported aliases to static functions 2016-09-08 12:53:00 +02:00
entry.S arm64: KVM: Handle async aborts delivered while at EL2 2016-09-08 12:53:00 +02:00
fpsimd.S arm64: KVM: Implement fpsimd save/restore 2015-12-14 11:30:41 +00:00
hyp-entry.S arm64: KVM: Handle async aborts delivered while at EL2 2016-09-08 12:53:00 +02:00
s2-setup.c kvm: arm64: Enable hardware updates of the Access Flag for Stage 2 page tables 2016-05-09 22:23:08 +02:00
switch.c arm64: KVM: Use static keys for selecting the GIC backend 2016-09-22 13:21:35 +02:00
sysreg-sr.c arm64: KVM: VHE: Context switch MDSCR_EL1 2016-07-23 18:07:12 +02:00
tlb.c arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a single CPU 2016-11-04 17:56:28 +00:00