mirror of https://gitee.com/openkylin/linux.git
336 lines
8.2 KiB
C
336 lines
8.2 KiB
C
/* linux/arch/arm/plat-s3c/dev-audio.c
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*
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* Copyright 2009 Wolfson Microelectronics
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* Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <mach/irqs.h>
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#include <mach/map.h>
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#include <mach/dma.h>
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#include <mach/gpio.h>
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#include <plat/devs.h>
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#include <plat/audio.h>
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#include <plat/gpio-cfg.h>
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#include <mach/gpio-bank-c.h>
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#include <mach/gpio-bank-d.h>
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#include <mach/gpio-bank-e.h>
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#include <mach/gpio-bank-h.h>
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static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
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{
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switch (pdev->id) {
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case 0:
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s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
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s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
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s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
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s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
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s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
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break;
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case 1:
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s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
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s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
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s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
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s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
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s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
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default:
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printk(KERN_DEBUG "Invalid I2S Controller number!");
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return -EINVAL;
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}
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return 0;
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}
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static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
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{
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s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
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s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
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s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
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s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
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s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
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s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
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s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
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return 0;
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}
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static struct resource s3c64xx_iis0_resource[] = {
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[0] = {
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.start = S3C64XX_PA_IIS0,
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.end = S3C64XX_PA_IIS0 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_I2S0_OUT,
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.end = DMACH_I2S0_OUT,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_I2S0_IN,
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.end = DMACH_I2S0_IN,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct s3c_audio_pdata s3c_i2s0_pdata = {
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.cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
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};
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struct platform_device s3c64xx_device_iis0 = {
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.name = "s3c64xx-iis",
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.id = 0,
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.num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
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.resource = s3c64xx_iis0_resource,
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.dev = {
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.platform_data = &s3c_i2s0_pdata,
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},
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};
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EXPORT_SYMBOL(s3c64xx_device_iis0);
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static struct resource s3c64xx_iis1_resource[] = {
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[0] = {
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.start = S3C64XX_PA_IIS1,
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.end = S3C64XX_PA_IIS1 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_I2S1_OUT,
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.end = DMACH_I2S1_OUT,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_I2S1_IN,
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.end = DMACH_I2S1_IN,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct s3c_audio_pdata s3c_i2s1_pdata = {
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.cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
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};
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struct platform_device s3c64xx_device_iis1 = {
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.name = "s3c64xx-iis",
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.id = 1,
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.num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
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.resource = s3c64xx_iis1_resource,
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.dev = {
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.platform_data = &s3c_i2s1_pdata,
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},
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};
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EXPORT_SYMBOL(s3c64xx_device_iis1);
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static struct resource s3c64xx_iisv4_resource[] = {
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[0] = {
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.start = S3C64XX_PA_IISV4,
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.end = S3C64XX_PA_IISV4 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_HSI_I2SV40_TX,
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.end = DMACH_HSI_I2SV40_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_HSI_I2SV40_RX,
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.end = DMACH_HSI_I2SV40_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct s3c_audio_pdata s3c_i2sv4_pdata = {
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.cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
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};
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struct platform_device s3c64xx_device_iisv4 = {
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.name = "s3c64xx-iis-v4",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
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.resource = s3c64xx_iisv4_resource,
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.dev = {
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.platform_data = &s3c_i2sv4_pdata,
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},
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};
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EXPORT_SYMBOL(s3c64xx_device_iisv4);
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/* PCM Controller platform_devices */
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static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
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{
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switch (pdev->id) {
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case 0:
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s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
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s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
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s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
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s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
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s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
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break;
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case 1:
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s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
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s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
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s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
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s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
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s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
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break;
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default:
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printk(KERN_DEBUG "Invalid PCM Controller number!");
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return -EINVAL;
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}
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return 0;
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}
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static struct resource s3c64xx_pcm0_resource[] = {
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[0] = {
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.start = S3C64XX_PA_PCM0,
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.end = S3C64XX_PA_PCM0 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_PCM0_TX,
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.end = DMACH_PCM0_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_PCM0_RX,
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.end = DMACH_PCM0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct s3c_audio_pdata s3c_pcm0_pdata = {
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.cfg_gpio = s3c64xx_pcm_cfg_gpio,
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};
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struct platform_device s3c64xx_device_pcm0 = {
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.name = "samsung-pcm",
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.id = 0,
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.num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource),
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.resource = s3c64xx_pcm0_resource,
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.dev = {
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.platform_data = &s3c_pcm0_pdata,
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},
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};
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EXPORT_SYMBOL(s3c64xx_device_pcm0);
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static struct resource s3c64xx_pcm1_resource[] = {
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[0] = {
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.start = S3C64XX_PA_PCM1,
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.end = S3C64XX_PA_PCM1 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_PCM1_TX,
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.end = DMACH_PCM1_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_PCM1_RX,
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.end = DMACH_PCM1_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct s3c_audio_pdata s3c_pcm1_pdata = {
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.cfg_gpio = s3c64xx_pcm_cfg_gpio,
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};
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struct platform_device s3c64xx_device_pcm1 = {
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.name = "samsung-pcm",
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.id = 1,
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.num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource),
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.resource = s3c64xx_pcm1_resource,
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.dev = {
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.platform_data = &s3c_pcm1_pdata,
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},
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};
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EXPORT_SYMBOL(s3c64xx_device_pcm1);
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/* AC97 Controller platform devices */
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static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
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{
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s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);
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s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
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s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
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s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
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s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
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return 0;
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}
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static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
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{
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s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);
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s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
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s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
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s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
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s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
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return 0;
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}
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static struct resource s3c64xx_ac97_resource[] = {
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[0] = {
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.start = S3C64XX_PA_AC97,
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.end = S3C64XX_PA_AC97 + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMACH_AC97_PCMOUT,
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.end = DMACH_AC97_PCMOUT,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMACH_AC97_PCMIN,
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.end = DMACH_AC97_PCMIN,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DMACH_AC97_MICIN,
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.end = DMACH_AC97_MICIN,
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.flags = IORESOURCE_DMA,
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},
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[4] = {
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.start = IRQ_AC97,
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.end = IRQ_AC97,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct s3c_audio_pdata s3c_ac97_pdata;
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static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32);
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struct platform_device s3c64xx_device_ac97 = {
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.name = "s3c-ac97",
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.id = -1,
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.num_resources = ARRAY_SIZE(s3c64xx_ac97_resource),
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.resource = s3c64xx_ac97_resource,
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.dev = {
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.platform_data = &s3c_ac97_pdata,
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.dma_mask = &s3c64xx_ac97_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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EXPORT_SYMBOL(s3c64xx_device_ac97);
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void __init s3c64xx_ac97_setup_gpio(int num)
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{
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if (num == S3C64XX_AC97_GPD)
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s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd;
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else
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s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe;
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}
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