mirror of https://gitee.com/openkylin/linux.git
809 lines
18 KiB
C
809 lines
18 KiB
C
/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* 2006 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/major.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/phy_fixed.h>
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#include <linux/spi/spi.h>
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#include <linux/fsl_devices.h>
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#include <linux/fs_enet_pd.h>
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#include <linux/fs_uart_pd.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/time.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#include <mm/mmu_decl.h>
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#include <asm/cpm2.h>
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extern void init_fcc_ioports(struct fs_platform_info*);
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extern void init_fec_ioports(struct fs_platform_info*);
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extern void init_smc_ioports(struct fs_uart_platform_info*);
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static phys_addr_t immrbase = -1;
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phys_addr_t get_immrbase(void)
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{
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struct device_node *soc;
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if (immrbase != -1)
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return immrbase;
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soc = of_find_node_by_type(NULL, "soc");
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if (soc) {
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int size;
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u32 naddr;
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const u32 *prop = of_get_property(soc, "#address-cells", &size);
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if (prop && size == 4)
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naddr = *prop;
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else
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naddr = 2;
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prop = of_get_property(soc, "ranges", &size);
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if (prop)
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immrbase = of_translate_address(soc, prop + naddr);
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of_node_put(soc);
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}
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return immrbase;
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}
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EXPORT_SYMBOL(get_immrbase);
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static u32 sysfreq = -1;
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u32 fsl_get_sys_freq(void)
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{
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struct device_node *soc;
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const u32 *prop;
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int size;
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if (sysfreq != -1)
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return sysfreq;
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soc = of_find_node_by_type(NULL, "soc");
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if (!soc)
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return -1;
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prop = of_get_property(soc, "clock-frequency", &size);
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if (!prop || size != sizeof(*prop) || *prop == 0)
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prop = of_get_property(soc, "bus-frequency", &size);
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if (prop && size == sizeof(*prop))
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sysfreq = *prop;
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of_node_put(soc);
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return sysfreq;
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}
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EXPORT_SYMBOL(fsl_get_sys_freq);
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#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
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static u32 brgfreq = -1;
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u32 get_brgfreq(void)
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{
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struct device_node *node;
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const unsigned int *prop;
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int size;
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if (brgfreq != -1)
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return brgfreq;
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node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
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if (node) {
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prop = of_get_property(node, "clock-frequency", &size);
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if (prop && size == 4)
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brgfreq = *prop;
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of_node_put(node);
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return brgfreq;
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}
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/* Legacy device binding -- will go away when no users are left. */
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node = of_find_node_by_type(NULL, "cpm");
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if (!node)
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node = of_find_compatible_node(NULL, NULL, "fsl,qe");
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if (!node)
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node = of_find_node_by_type(NULL, "qe");
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if (node) {
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prop = of_get_property(node, "brg-frequency", &size);
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if (prop && size == 4)
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brgfreq = *prop;
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if (brgfreq == -1 || brgfreq == 0) {
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prop = of_get_property(node, "bus-frequency", &size);
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if (prop && size == 4)
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brgfreq = *prop / 2;
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}
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of_node_put(node);
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}
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return brgfreq;
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}
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EXPORT_SYMBOL(get_brgfreq);
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static u32 fs_baudrate = -1;
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u32 get_baudrate(void)
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{
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struct device_node *node;
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if (fs_baudrate != -1)
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return fs_baudrate;
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node = of_find_node_by_type(NULL, "serial");
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if (node) {
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int size;
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const unsigned int *prop = of_get_property(node,
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"current-speed", &size);
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if (prop)
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fs_baudrate = *prop;
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of_node_put(node);
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}
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return fs_baudrate;
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}
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EXPORT_SYMBOL(get_baudrate);
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#endif /* CONFIG_CPM2 */
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#ifdef CONFIG_FIXED_PHY
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static int __init of_add_fixed_phys(void)
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{
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int ret;
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struct device_node *np;
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u32 *fixed_link;
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struct fixed_phy_status status = {};
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for_each_node_by_name(np, "ethernet") {
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fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
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if (!fixed_link)
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continue;
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status.link = 1;
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status.duplex = fixed_link[1];
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status.speed = fixed_link[2];
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status.pause = fixed_link[3];
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status.asym_pause = fixed_link[4];
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ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
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if (ret) {
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of_node_put(np);
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return ret;
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}
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}
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return 0;
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}
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arch_initcall(of_add_fixed_phys);
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#endif /* CONFIG_FIXED_PHY */
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static int gfar_mdio_of_init_one(struct device_node *np)
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{
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int k;
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struct device_node *child = NULL;
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struct gianfar_mdio_data mdio_data;
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struct platform_device *mdio_dev;
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struct resource res;
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int ret;
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memset(&res, 0, sizeof(res));
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memset(&mdio_data, 0, sizeof(mdio_data));
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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return ret;
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mdio_dev = platform_device_register_simple("fsl-gianfar_mdio",
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res.start&0xfffff, &res, 1);
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if (IS_ERR(mdio_dev))
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return PTR_ERR(mdio_dev);
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for (k = 0; k < 32; k++)
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mdio_data.irq[k] = PHY_POLL;
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while ((child = of_get_next_child(np, child)) != NULL) {
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int irq = irq_of_parse_and_map(child, 0);
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if (irq != NO_IRQ) {
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const u32 *id = of_get_property(child, "reg", NULL);
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mdio_data.irq[*id] = irq;
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}
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}
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ret = platform_device_add_data(mdio_dev, &mdio_data,
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sizeof(struct gianfar_mdio_data));
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if (ret)
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platform_device_unregister(mdio_dev);
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return ret;
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}
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static int __init gfar_mdio_of_init(void)
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{
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struct device_node *np = NULL;
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for_each_compatible_node(np, NULL, "fsl,gianfar-mdio")
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gfar_mdio_of_init_one(np);
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/* try the deprecated version */
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for_each_compatible_node(np, "mdio", "gianfar");
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gfar_mdio_of_init_one(np);
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return 0;
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}
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arch_initcall(gfar_mdio_of_init);
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static const char *gfar_tx_intr = "tx";
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static const char *gfar_rx_intr = "rx";
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static const char *gfar_err_intr = "error";
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static int __init gfar_of_init(void)
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{
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struct device_node *np;
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unsigned int i;
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struct platform_device *gfar_dev;
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struct resource res;
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int ret;
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for (np = NULL, i = 0;
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(np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
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i++) {
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struct resource r[4];
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struct device_node *phy, *mdio;
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struct gianfar_platform_data gfar_data;
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const unsigned int *id;
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const char *model;
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const char *ctype;
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const void *mac_addr;
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const phandle *ph;
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int n_res = 2;
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if (!of_device_is_available(np))
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continue;
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memset(r, 0, sizeof(r));
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memset(&gfar_data, 0, sizeof(gfar_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto err;
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of_irq_to_resource(np, 0, &r[1]);
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model = of_get_property(np, "model", NULL);
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/* If we aren't the FEC we have multiple interrupts */
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if (model && strcasecmp(model, "FEC")) {
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r[1].name = gfar_tx_intr;
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r[2].name = gfar_rx_intr;
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of_irq_to_resource(np, 1, &r[2]);
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r[3].name = gfar_err_intr;
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of_irq_to_resource(np, 2, &r[3]);
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n_res += 2;
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}
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gfar_dev =
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platform_device_register_simple("fsl-gianfar", i, &r[0],
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n_res);
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if (IS_ERR(gfar_dev)) {
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ret = PTR_ERR(gfar_dev);
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goto err;
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}
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mac_addr = of_get_mac_address(np);
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if (mac_addr)
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memcpy(gfar_data.mac_addr, mac_addr, 6);
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if (model && !strcasecmp(model, "TSEC"))
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gfar_data.device_flags =
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FSL_GIANFAR_DEV_HAS_GIGABIT |
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FSL_GIANFAR_DEV_HAS_COALESCE |
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FSL_GIANFAR_DEV_HAS_RMON |
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FSL_GIANFAR_DEV_HAS_MULTI_INTR;
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if (model && !strcasecmp(model, "eTSEC"))
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gfar_data.device_flags =
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FSL_GIANFAR_DEV_HAS_GIGABIT |
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FSL_GIANFAR_DEV_HAS_COALESCE |
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FSL_GIANFAR_DEV_HAS_RMON |
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FSL_GIANFAR_DEV_HAS_MULTI_INTR |
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FSL_GIANFAR_DEV_HAS_CSUM |
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FSL_GIANFAR_DEV_HAS_VLAN |
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FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
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ctype = of_get_property(np, "phy-connection-type", NULL);
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/* We only care about rgmii-id. The rest are autodetected */
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if (ctype && !strcmp(ctype, "rgmii-id"))
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gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
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else
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gfar_data.interface = PHY_INTERFACE_MODE_MII;
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if (of_get_property(np, "fsl,magic-packet", NULL))
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gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
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ph = of_get_property(np, "phy-handle", NULL);
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if (ph == NULL) {
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u32 *fixed_link;
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fixed_link = (u32 *)of_get_property(np, "fixed-link",
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NULL);
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if (!fixed_link) {
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ret = -ENODEV;
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goto unreg;
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}
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snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
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gfar_data.phy_id = fixed_link[0];
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} else {
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phy = of_find_node_by_phandle(*ph);
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if (phy == NULL) {
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ret = -ENODEV;
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goto unreg;
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}
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mdio = of_get_parent(phy);
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id = of_get_property(phy, "reg", NULL);
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ret = of_address_to_resource(mdio, 0, &res);
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if (ret) {
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of_node_put(phy);
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of_node_put(mdio);
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goto unreg;
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}
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gfar_data.phy_id = *id;
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snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
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(unsigned long long)res.start&0xfffff);
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of_node_put(phy);
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of_node_put(mdio);
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}
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ret =
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platform_device_add_data(gfar_dev, &gfar_data,
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sizeof(struct
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gianfar_platform_data));
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if (ret)
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goto unreg;
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}
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return 0;
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unreg:
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platform_device_unregister(gfar_dev);
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err:
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return ret;
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}
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arch_initcall(gfar_of_init);
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#ifdef CONFIG_PPC_83xx
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static int __init mpc83xx_wdt_init(void)
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{
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struct resource r;
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struct device_node *np;
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struct platform_device *dev;
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u32 freq = fsl_get_sys_freq();
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int ret;
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np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
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if (!np) {
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ret = -ENODEV;
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goto nodev;
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}
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memset(&r, 0, sizeof(r));
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ret = of_address_to_resource(np, 0, &r);
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if (ret)
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goto err;
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dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
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if (IS_ERR(dev)) {
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ret = PTR_ERR(dev);
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goto err;
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}
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ret = platform_device_add_data(dev, &freq, sizeof(freq));
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if (ret)
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goto unreg;
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of_node_put(np);
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return 0;
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unreg:
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platform_device_unregister(dev);
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err:
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of_node_put(np);
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nodev:
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return ret;
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}
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arch_initcall(mpc83xx_wdt_init);
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#endif
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static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
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{
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if (!phy_type)
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return FSL_USB2_PHY_NONE;
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if (!strcasecmp(phy_type, "ulpi"))
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return FSL_USB2_PHY_ULPI;
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if (!strcasecmp(phy_type, "utmi"))
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return FSL_USB2_PHY_UTMI;
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if (!strcasecmp(phy_type, "utmi_wide"))
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return FSL_USB2_PHY_UTMI_WIDE;
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if (!strcasecmp(phy_type, "serial"))
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return FSL_USB2_PHY_SERIAL;
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return FSL_USB2_PHY_NONE;
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}
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static int __init fsl_usb_of_init(void)
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{
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struct device_node *np;
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unsigned int i = 0;
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struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
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*usb_dev_dr_client = NULL;
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int ret;
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for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
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struct resource r[2];
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struct fsl_usb2_platform_data usb_data;
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const unsigned char *prop = NULL;
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memset(&r, 0, sizeof(r));
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memset(&usb_data, 0, sizeof(usb_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto err;
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of_irq_to_resource(np, 0, &r[1]);
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usb_dev_mph =
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platform_device_register_simple("fsl-ehci", i, r, 2);
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if (IS_ERR(usb_dev_mph)) {
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ret = PTR_ERR(usb_dev_mph);
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goto err;
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}
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usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
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usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
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usb_data.operating_mode = FSL_USB2_MPH_HOST;
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prop = of_get_property(np, "port0", NULL);
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if (prop)
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usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
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prop = of_get_property(np, "port1", NULL);
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if (prop)
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usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
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prop = of_get_property(np, "phy_type", NULL);
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usb_data.phy_mode = determine_usb_phy(prop);
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ret =
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platform_device_add_data(usb_dev_mph, &usb_data,
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sizeof(struct
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fsl_usb2_platform_data));
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if (ret)
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goto unreg_mph;
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i++;
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}
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for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
|
|
struct resource r[2];
|
|
struct fsl_usb2_platform_data usb_data;
|
|
const unsigned char *prop = NULL;
|
|
|
|
memset(&r, 0, sizeof(r));
|
|
memset(&usb_data, 0, sizeof(usb_data));
|
|
|
|
ret = of_address_to_resource(np, 0, &r[0]);
|
|
if (ret)
|
|
goto unreg_mph;
|
|
|
|
of_irq_to_resource(np, 0, &r[1]);
|
|
|
|
prop = of_get_property(np, "dr_mode", NULL);
|
|
|
|
if (!prop || !strcmp(prop, "host")) {
|
|
usb_data.operating_mode = FSL_USB2_DR_HOST;
|
|
usb_dev_dr_host = platform_device_register_simple(
|
|
"fsl-ehci", i, r, 2);
|
|
if (IS_ERR(usb_dev_dr_host)) {
|
|
ret = PTR_ERR(usb_dev_dr_host);
|
|
goto err;
|
|
}
|
|
} else if (prop && !strcmp(prop, "peripheral")) {
|
|
usb_data.operating_mode = FSL_USB2_DR_DEVICE;
|
|
usb_dev_dr_client = platform_device_register_simple(
|
|
"fsl-usb2-udc", i, r, 2);
|
|
if (IS_ERR(usb_dev_dr_client)) {
|
|
ret = PTR_ERR(usb_dev_dr_client);
|
|
goto err;
|
|
}
|
|
} else if (prop && !strcmp(prop, "otg")) {
|
|
usb_data.operating_mode = FSL_USB2_DR_OTG;
|
|
usb_dev_dr_host = platform_device_register_simple(
|
|
"fsl-ehci", i, r, 2);
|
|
if (IS_ERR(usb_dev_dr_host)) {
|
|
ret = PTR_ERR(usb_dev_dr_host);
|
|
goto err;
|
|
}
|
|
usb_dev_dr_client = platform_device_register_simple(
|
|
"fsl-usb2-udc", i, r, 2);
|
|
if (IS_ERR(usb_dev_dr_client)) {
|
|
ret = PTR_ERR(usb_dev_dr_client);
|
|
goto err;
|
|
}
|
|
} else {
|
|
ret = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
prop = of_get_property(np, "phy_type", NULL);
|
|
usb_data.phy_mode = determine_usb_phy(prop);
|
|
|
|
if (usb_dev_dr_host) {
|
|
usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
|
|
usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
|
|
dev.coherent_dma_mask;
|
|
if ((ret = platform_device_add_data(usb_dev_dr_host,
|
|
&usb_data, sizeof(struct
|
|
fsl_usb2_platform_data))))
|
|
goto unreg_dr;
|
|
}
|
|
if (usb_dev_dr_client) {
|
|
usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
|
|
usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
|
|
dev.coherent_dma_mask;
|
|
if ((ret = platform_device_add_data(usb_dev_dr_client,
|
|
&usb_data, sizeof(struct
|
|
fsl_usb2_platform_data))))
|
|
goto unreg_dr;
|
|
}
|
|
i++;
|
|
}
|
|
return 0;
|
|
|
|
unreg_dr:
|
|
if (usb_dev_dr_host)
|
|
platform_device_unregister(usb_dev_dr_host);
|
|
if (usb_dev_dr_client)
|
|
platform_device_unregister(usb_dev_dr_client);
|
|
unreg_mph:
|
|
if (usb_dev_mph)
|
|
platform_device_unregister(usb_dev_mph);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
arch_initcall(fsl_usb_of_init);
|
|
|
|
static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
|
|
struct spi_board_info *board_infos,
|
|
unsigned int num_board_infos,
|
|
void (*activate_cs)(u8 cs, u8 polarity),
|
|
void (*deactivate_cs)(u8 cs, u8 polarity))
|
|
{
|
|
struct device_node *np;
|
|
unsigned int i = 0;
|
|
|
|
for_each_compatible_node(np, type, compatible) {
|
|
int ret;
|
|
unsigned int j;
|
|
const void *prop;
|
|
struct resource res[2];
|
|
struct platform_device *pdev;
|
|
struct fsl_spi_platform_data pdata = {
|
|
.activate_cs = activate_cs,
|
|
.deactivate_cs = deactivate_cs,
|
|
};
|
|
|
|
memset(res, 0, sizeof(res));
|
|
|
|
pdata.sysclk = sysclk;
|
|
|
|
prop = of_get_property(np, "reg", NULL);
|
|
if (!prop)
|
|
goto err;
|
|
pdata.bus_num = *(u32 *)prop;
|
|
|
|
prop = of_get_property(np, "cell-index", NULL);
|
|
if (prop)
|
|
i = *(u32 *)prop;
|
|
|
|
prop = of_get_property(np, "mode", NULL);
|
|
if (prop && !strcmp(prop, "cpu-qe"))
|
|
pdata.qe_mode = 1;
|
|
|
|
for (j = 0; j < num_board_infos; j++) {
|
|
if (board_infos[j].bus_num == pdata.bus_num)
|
|
pdata.max_chipselect++;
|
|
}
|
|
|
|
if (!pdata.max_chipselect)
|
|
continue;
|
|
|
|
ret = of_address_to_resource(np, 0, &res[0]);
|
|
if (ret)
|
|
goto err;
|
|
|
|
ret = of_irq_to_resource(np, 0, &res[1]);
|
|
if (ret == NO_IRQ)
|
|
goto err;
|
|
|
|
pdev = platform_device_alloc("mpc83xx_spi", i);
|
|
if (!pdev)
|
|
goto err;
|
|
|
|
ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
|
|
if (ret)
|
|
goto unreg;
|
|
|
|
ret = platform_device_add_resources(pdev, res,
|
|
ARRAY_SIZE(res));
|
|
if (ret)
|
|
goto unreg;
|
|
|
|
ret = platform_device_add(pdev);
|
|
if (ret)
|
|
goto unreg;
|
|
|
|
goto next;
|
|
unreg:
|
|
platform_device_del(pdev);
|
|
err:
|
|
pr_err("%s: registration failed\n", np->full_name);
|
|
next:
|
|
i++;
|
|
}
|
|
|
|
return i;
|
|
}
|
|
|
|
int __init fsl_spi_init(struct spi_board_info *board_infos,
|
|
unsigned int num_board_infos,
|
|
void (*activate_cs)(u8 cs, u8 polarity),
|
|
void (*deactivate_cs)(u8 cs, u8 polarity))
|
|
{
|
|
u32 sysclk = -1;
|
|
int ret;
|
|
|
|
#ifdef CONFIG_QUICC_ENGINE
|
|
/* SPI controller is either clocked from QE or SoC clock */
|
|
sysclk = get_brgfreq();
|
|
#endif
|
|
if (sysclk == -1) {
|
|
sysclk = fsl_get_sys_freq();
|
|
if (sysclk == -1)
|
|
return -ENODEV;
|
|
}
|
|
|
|
ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
|
|
num_board_infos, activate_cs, deactivate_cs);
|
|
if (!ret)
|
|
of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
|
|
num_board_infos, activate_cs, deactivate_cs);
|
|
|
|
return spi_register_board_info(board_infos, num_board_infos);
|
|
}
|
|
|
|
#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
|
|
static __be32 __iomem *rstcr;
|
|
|
|
static int __init setup_rstcr(void)
|
|
{
|
|
struct device_node *np;
|
|
np = of_find_node_by_name(NULL, "global-utilities");
|
|
if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
|
|
const u32 *prop = of_get_property(np, "reg", NULL);
|
|
if (prop) {
|
|
/* map reset control register
|
|
* 0xE00B0 is offset of reset control register
|
|
*/
|
|
rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
|
|
if (!rstcr)
|
|
printk (KERN_EMERG "Error: reset control "
|
|
"register not mapped!\n");
|
|
}
|
|
} else
|
|
printk (KERN_INFO "rstcr compatible register does not exist!\n");
|
|
if (np)
|
|
of_node_put(np);
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(setup_rstcr);
|
|
|
|
void fsl_rstcr_restart(char *cmd)
|
|
{
|
|
local_irq_disable();
|
|
if (rstcr)
|
|
/* set reset control register */
|
|
out_be32(rstcr, 0x2); /* HRESET_REQ */
|
|
|
|
while (1) ;
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
|
|
struct platform_diu_data_ops diu_ops = {
|
|
.diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */
|
|
};
|
|
EXPORT_SYMBOL(diu_ops);
|
|
|
|
int __init preallocate_diu_videomemory(void)
|
|
{
|
|
pr_debug("diu_size=%lu\n", diu_ops.diu_size);
|
|
|
|
diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0);
|
|
if (!diu_ops.diu_mem) {
|
|
printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n",
|
|
diu_ops.diu_size);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
pr_debug("diu_mem=%p\n", diu_ops.diu_mem);
|
|
|
|
rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block),
|
|
diu_ops.diu_rh_block);
|
|
return rh_attach_region(&diu_ops.diu_rh_info,
|
|
(unsigned long) diu_ops.diu_mem,
|
|
diu_ops.diu_size);
|
|
}
|
|
|
|
static int __init early_parse_diufb(char *p)
|
|
{
|
|
if (!p)
|
|
return 1;
|
|
|
|
diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8);
|
|
|
|
pr_debug("diu_size=%lu\n", diu_ops.diu_size);
|
|
|
|
return 0;
|
|
}
|
|
early_param("diufb", early_parse_diufb);
|
|
|
|
#endif
|