Taras Kondratiuk b25f3e1c35 ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling ... Kexec disables outer cache before jumping to reboot code, but it doesn't flush it explicitly. Flush is done implicitly inside of l2x0_disable(). But some SoC's override default .disable handler and don't flush cache. This may lead to a corrupted memory during Kexec reboot on these platforms. This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable() handlers to make it consistent with default l2x0_disable(). Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2014-01-12 14:15:27 +00:00
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Kconfig	ARM: SoC fixes for 3.13 merge window	2013-11-16 12:45:55 -08:00
Makefile	ARM: highbank: adapt to use ARM PSCI calls	2013-10-01 16:34:16 -05:00
core.h	ARM: highbank: adapt to use ARM PSCI calls	2013-10-01 16:34:16 -05:00
highbank.c	ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling	2014-01-12 14:15:27 +00:00
pm.c	ARM: highbank: adapt to use ARM PSCI calls	2013-10-01 16:34:16 -05:00
smc.S	ARM: highbank: Add smc calls to enable/disable the L2	2012-06-07 22:39:43 -07:00
sysregs.h	ARM: highbank: mask cluster id from cpu_logical_map	2013-01-31 13:54:30 -06:00
system.c	reboot: arm: change reboot_mode to use enum reboot_mode	2013-07-09 10:33:29 -07:00