mirror of https://gitee.com/openkylin/linux.git
51 lines
746 B
Plaintext
51 lines
746 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2017 Andreas Färber
|
|
* Copyright (c) 2018 Manivannan Sadhasivam
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "rda8810pl.dtsi"
|
|
|
|
/ {
|
|
compatible = "xunlong,orangepi-2g-iot", "rda,8810pl";
|
|
model = "Orange Pi 2G-IoT";
|
|
|
|
aliases {
|
|
serial0 = &uart1;
|
|
serial1 = &uart2;
|
|
serial2 = &uart3;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial2:921600n8";
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x10000000>;
|
|
};
|
|
|
|
uart_clk: uart-clk {
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <921600>;
|
|
#clock-cells = <0>;
|
|
};
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
clocks = <&uart_clk>;
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
clocks = <&uart_clk>;
|
|
};
|
|
|
|
&uart3 {
|
|
status = "okay";
|
|
clocks = <&uart_clk>;
|
|
};
|