mirror of https://gitee.com/openkylin/linux.git
7d5fc85d96
When setting the rate of a clock, by default the clock framework will change the parent of the clock to the most suitable one in __clk_mux_determine_rate() (most suitable by looking at the clock rate). This is a rather dangerous default, and causes problems on AM43x when using display and ethernet. There are multiple ways to select the clock muxes on AM43x, and some of those clock paths have the same source clocks for display and ethernet. When changing the clock rate for the display subsystem, the clock framework decides to change the display mux from the dedicated display PLL to a shared PLL which is used by the ethernet, and then changes the rate of the shared PLL, breaking the ethernet. As I don't think there ever is a case where we want the clock framework to automatically change the parent clock of a clock mux, this patch sets the CLK_SET_RATE_NO_REPARENT for all ti,mux-clocks. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Tested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
||
|---|---|---|
| .. | ||
| Makefile | ||
| apll.c | ||
| autoidle.c | ||
| clk-2xxx.c | ||
| clk-3xxx.c | ||
| clk-7xx.c | ||
| clk-33xx.c | ||
| clk-43xx.c | ||
| clk-44xx.c | ||
| clk-54xx.c | ||
| clk-dra7-atl.c | ||
| clk.c | ||
| clockdomain.c | ||
| composite.c | ||
| divider.c | ||
| dpll.c | ||
| fixed-factor.c | ||
| gate.c | ||
| interface.c | ||
| mux.c | ||