mirror of https://gitee.com/openkylin/linux.git
56 lines
933 B
Plaintext
56 lines
933 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* LiteX-based System on Chip
|
|
*
|
|
* Copyright (C) 2019 Antmicro <www.antmicro.com>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/ {
|
|
compatible = "opencores,or1ksim";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&pic>;
|
|
|
|
aliases {
|
|
serial0 = &serial0;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=liteuart";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x10000000>;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cpu@0 {
|
|
compatible = "opencores,or1200-rtlsvn481";
|
|
reg = <0>;
|
|
clock-frequency = <100000000>;
|
|
};
|
|
};
|
|
|
|
pic: pic {
|
|
compatible = "opencores,or1k-pic";
|
|
#interrupt-cells = <1>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
serial0: serial@e0002000 {
|
|
device_type = "serial";
|
|
compatible = "litex,liteuart";
|
|
reg = <0xe0002000 0x100>;
|
|
};
|
|
|
|
soc_ctrl0: soc_controller@e0000000 {
|
|
compatible = "litex,soc-controller";
|
|
reg = <0xe0000000 0xc>;
|
|
status = "okay";
|
|
};
|
|
};
|