mirror of https://gitee.com/openkylin/linux.git
1157 lines
32 KiB
C
1157 lines
32 KiB
C
/*
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* Copyright (c) 2016 Hisilicon Limited.
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/platform_device.h>
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#include "hns_roce_device.h"
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#include "hns_roce_hem.h"
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#include "hns_roce_common.h"
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#define DMA_ADDR_T_SHIFT 12
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#define BT_BA_SHIFT 32
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bool hns_roce_check_whether_mhop(struct hns_roce_dev *hr_dev, u32 type)
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{
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if ((hr_dev->caps.qpc_hop_num && type == HEM_TYPE_QPC) ||
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(hr_dev->caps.mpt_hop_num && type == HEM_TYPE_MTPT) ||
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(hr_dev->caps.cqc_hop_num && type == HEM_TYPE_CQC) ||
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(hr_dev->caps.srqc_hop_num && type == HEM_TYPE_SRQC) ||
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(hr_dev->caps.sccc_hop_num && type == HEM_TYPE_SCCC) ||
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(hr_dev->caps.qpc_timer_hop_num && type == HEM_TYPE_QPC_TIMER) ||
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(hr_dev->caps.cqc_timer_hop_num && type == HEM_TYPE_CQC_TIMER) ||
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(hr_dev->caps.cqe_hop_num && type == HEM_TYPE_CQE) ||
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(hr_dev->caps.mtt_hop_num && type == HEM_TYPE_MTT) ||
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(hr_dev->caps.srqwqe_hop_num && type == HEM_TYPE_SRQWQE) ||
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(hr_dev->caps.idx_hop_num && type == HEM_TYPE_IDX))
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return true;
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return false;
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}
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EXPORT_SYMBOL_GPL(hns_roce_check_whether_mhop);
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static bool hns_roce_check_hem_null(struct hns_roce_hem **hem, u64 start_idx,
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u32 bt_chunk_num)
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{
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int i;
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for (i = 0; i < bt_chunk_num; i++)
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if (hem[start_idx + i])
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return false;
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return true;
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}
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static bool hns_roce_check_bt_null(u64 **bt, u64 start_idx, u32 bt_chunk_num)
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{
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int i;
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for (i = 0; i < bt_chunk_num; i++)
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if (bt[start_idx + i])
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return false;
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return true;
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}
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static int hns_roce_get_bt_num(u32 table_type, u32 hop_num)
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{
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if (check_whether_bt_num_3(table_type, hop_num))
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return 3;
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else if (check_whether_bt_num_2(table_type, hop_num))
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return 2;
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else if (check_whether_bt_num_1(table_type, hop_num))
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return 1;
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else
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return 0;
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}
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int hns_roce_calc_hem_mhop(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, unsigned long *obj,
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struct hns_roce_hem_mhop *mhop)
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{
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struct device *dev = hr_dev->dev;
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u32 chunk_ba_num;
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u32 table_idx;
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u32 bt_num;
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u32 chunk_size;
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switch (table->type) {
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case HEM_TYPE_QPC:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.qpc_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.qpc_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.qpc_bt_num;
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mhop->hop_num = hr_dev->caps.qpc_hop_num;
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break;
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case HEM_TYPE_MTPT:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.mpt_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.mpt_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.mpt_bt_num;
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mhop->hop_num = hr_dev->caps.mpt_hop_num;
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break;
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case HEM_TYPE_CQC:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.cqc_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.cqc_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.cqc_bt_num;
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mhop->hop_num = hr_dev->caps.cqc_hop_num;
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break;
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case HEM_TYPE_SCCC:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.sccc_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.sccc_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.sccc_bt_num;
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mhop->hop_num = hr_dev->caps.sccc_hop_num;
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break;
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case HEM_TYPE_QPC_TIMER:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.qpc_timer_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.qpc_timer_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.qpc_timer_bt_num;
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mhop->hop_num = hr_dev->caps.qpc_timer_hop_num;
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break;
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case HEM_TYPE_CQC_TIMER:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.cqc_timer_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.cqc_timer_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.cqc_timer_bt_num;
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mhop->hop_num = hr_dev->caps.cqc_timer_hop_num;
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break;
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case HEM_TYPE_SRQC:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.srqc_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.srqc_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = hr_dev->caps.srqc_bt_num;
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mhop->hop_num = hr_dev->caps.srqc_hop_num;
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break;
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case HEM_TYPE_MTT:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.mtt_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.mtt_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = mhop->bt_chunk_size / 8;
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mhop->hop_num = hr_dev->caps.mtt_hop_num;
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break;
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case HEM_TYPE_CQE:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.cqe_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.cqe_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = mhop->bt_chunk_size / 8;
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mhop->hop_num = hr_dev->caps.cqe_hop_num;
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break;
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case HEM_TYPE_SRQWQE:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.srqwqe_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.srqwqe_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = mhop->bt_chunk_size / 8;
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mhop->hop_num = hr_dev->caps.srqwqe_hop_num;
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break;
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case HEM_TYPE_IDX:
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mhop->buf_chunk_size = 1 << (hr_dev->caps.idx_buf_pg_sz
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+ PAGE_SHIFT);
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mhop->bt_chunk_size = 1 << (hr_dev->caps.idx_ba_pg_sz
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+ PAGE_SHIFT);
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mhop->ba_l0_num = mhop->bt_chunk_size / 8;
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mhop->hop_num = hr_dev->caps.idx_hop_num;
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break;
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default:
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dev_err(dev, "Table %d not support multi-hop addressing!\n",
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table->type);
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return -EINVAL;
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}
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if (!obj)
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return 0;
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/*
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* QPC/MTPT/CQC/SRQC/SCCC alloc hem for buffer pages.
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* MTT/CQE alloc hem for bt pages.
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*/
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bt_num = hns_roce_get_bt_num(table->type, mhop->hop_num);
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chunk_ba_num = mhop->bt_chunk_size / 8;
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chunk_size = table->type < HEM_TYPE_MTT ? mhop->buf_chunk_size :
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mhop->bt_chunk_size;
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table_idx = (*obj & (table->num_obj - 1)) /
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(chunk_size / table->obj_size);
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switch (bt_num) {
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case 3:
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mhop->l2_idx = table_idx & (chunk_ba_num - 1);
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mhop->l1_idx = table_idx / chunk_ba_num & (chunk_ba_num - 1);
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mhop->l0_idx = (table_idx / chunk_ba_num) / chunk_ba_num;
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break;
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case 2:
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mhop->l1_idx = table_idx & (chunk_ba_num - 1);
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mhop->l0_idx = table_idx / chunk_ba_num;
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break;
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case 1:
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mhop->l0_idx = table_idx;
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break;
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default:
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dev_err(dev, "Table %d not support hop_num = %d!\n",
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table->type, mhop->hop_num);
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return -EINVAL;
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}
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if (mhop->l0_idx >= mhop->ba_l0_num)
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mhop->l0_idx %= mhop->ba_l0_num;
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return 0;
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}
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EXPORT_SYMBOL_GPL(hns_roce_calc_hem_mhop);
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static struct hns_roce_hem *hns_roce_alloc_hem(struct hns_roce_dev *hr_dev,
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int npages,
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unsigned long hem_alloc_size,
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gfp_t gfp_mask)
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{
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struct hns_roce_hem_chunk *chunk = NULL;
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struct hns_roce_hem *hem;
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struct scatterlist *mem;
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int order;
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void *buf;
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WARN_ON(gfp_mask & __GFP_HIGHMEM);
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hem = kmalloc(sizeof(*hem),
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gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
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if (!hem)
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return NULL;
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hem->refcount = 0;
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INIT_LIST_HEAD(&hem->chunk_list);
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order = get_order(hem_alloc_size);
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while (npages > 0) {
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if (!chunk) {
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chunk = kmalloc(sizeof(*chunk),
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gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
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if (!chunk)
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goto fail;
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sg_init_table(chunk->mem, HNS_ROCE_HEM_CHUNK_LEN);
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chunk->npages = 0;
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chunk->nsg = 0;
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memset(chunk->buf, 0, sizeof(chunk->buf));
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list_add_tail(&chunk->list, &hem->chunk_list);
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}
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while (1 << order > npages)
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--order;
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/*
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* Alloc memory one time. If failed, don't alloc small block
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* memory, directly return fail.
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*/
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mem = &chunk->mem[chunk->npages];
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buf = dma_alloc_coherent(hr_dev->dev, PAGE_SIZE << order,
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&sg_dma_address(mem), gfp_mask);
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if (!buf)
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goto fail;
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chunk->buf[chunk->npages] = buf;
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sg_dma_len(mem) = PAGE_SIZE << order;
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++chunk->npages;
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++chunk->nsg;
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npages -= 1 << order;
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}
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return hem;
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fail:
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hns_roce_free_hem(hr_dev, hem);
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return NULL;
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}
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void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem)
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{
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struct hns_roce_hem_chunk *chunk, *tmp;
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int i;
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if (!hem)
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return;
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list_for_each_entry_safe(chunk, tmp, &hem->chunk_list, list) {
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for (i = 0; i < chunk->npages; ++i)
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dma_free_coherent(hr_dev->dev,
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sg_dma_len(&chunk->mem[i]),
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chunk->buf[i],
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sg_dma_address(&chunk->mem[i]));
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kfree(chunk);
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}
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kfree(hem);
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}
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static int hns_roce_set_hem(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, unsigned long obj)
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{
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spinlock_t *lock = &hr_dev->bt_cmd_lock;
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struct device *dev = hr_dev->dev;
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unsigned long end = 0;
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unsigned long flags;
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struct hns_roce_hem_iter iter;
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void __iomem *bt_cmd;
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u32 bt_cmd_h_val = 0;
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u32 bt_cmd_val[2];
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u32 bt_cmd_l = 0;
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u64 bt_ba = 0;
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int ret = 0;
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/* Find the HEM(Hardware Entry Memory) entry */
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unsigned long i = (obj & (table->num_obj - 1)) /
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(table->table_chunk_size / table->obj_size);
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switch (table->type) {
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case HEM_TYPE_QPC:
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roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M,
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ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S, HEM_TYPE_QPC);
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break;
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case HEM_TYPE_MTPT:
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roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M,
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ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S,
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HEM_TYPE_MTPT);
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break;
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case HEM_TYPE_CQC:
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roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M,
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ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S, HEM_TYPE_CQC);
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break;
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case HEM_TYPE_SRQC:
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roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M,
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ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S,
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HEM_TYPE_SRQC);
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break;
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default:
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return ret;
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}
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roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_M,
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ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_S, obj);
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roce_set_bit(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_S, 0);
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roce_set_bit(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_HW_SYNS_S, 1);
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/* Currently iter only a chunk */
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for (hns_roce_hem_first(table->hem[i], &iter);
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!hns_roce_hem_last(&iter); hns_roce_hem_next(&iter)) {
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bt_ba = hns_roce_hem_addr(&iter) >> DMA_ADDR_T_SHIFT;
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spin_lock_irqsave(lock, flags);
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bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG;
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|
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end = msecs_to_jiffies(HW_SYNC_TIMEOUT_MSECS) + jiffies;
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while (1) {
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if (readl(bt_cmd) >> BT_CMD_SYNC_SHIFT) {
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if (!(time_before(jiffies, end))) {
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dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n");
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spin_unlock_irqrestore(lock, flags);
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return -EBUSY;
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}
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} else {
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break;
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}
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mdelay(HW_SYNC_SLEEP_TIME_INTERVAL);
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}
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bt_cmd_l = (u32)bt_ba;
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roce_set_field(bt_cmd_h_val, ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_M,
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ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_S,
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bt_ba >> BT_BA_SHIFT);
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|
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bt_cmd_val[0] = bt_cmd_l;
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bt_cmd_val[1] = bt_cmd_h_val;
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hns_roce_write64_k(bt_cmd_val,
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hr_dev->reg_base + ROCEE_BT_CMD_L_REG);
|
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spin_unlock_irqrestore(lock, flags);
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}
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return ret;
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}
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|
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static int hns_roce_table_mhop_get(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table,
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unsigned long obj)
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{
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struct device *dev = hr_dev->dev;
|
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struct hns_roce_hem_mhop mhop;
|
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struct hns_roce_hem_iter iter;
|
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u32 buf_chunk_size;
|
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u32 bt_chunk_size;
|
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u32 chunk_ba_num;
|
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u32 hop_num;
|
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u32 size;
|
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u32 bt_num;
|
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u64 hem_idx;
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u64 bt_l1_idx = 0;
|
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u64 bt_l0_idx = 0;
|
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u64 bt_ba;
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unsigned long mhop_obj = obj;
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int bt_l1_allocated = 0;
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int bt_l0_allocated = 0;
|
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int step_idx;
|
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int ret;
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|
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ret = hns_roce_calc_hem_mhop(hr_dev, table, &mhop_obj, &mhop);
|
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if (ret)
|
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return ret;
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|
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buf_chunk_size = mhop.buf_chunk_size;
|
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bt_chunk_size = mhop.bt_chunk_size;
|
|
hop_num = mhop.hop_num;
|
|
chunk_ba_num = bt_chunk_size / 8;
|
|
|
|
bt_num = hns_roce_get_bt_num(table->type, hop_num);
|
|
switch (bt_num) {
|
|
case 3:
|
|
hem_idx = mhop.l0_idx * chunk_ba_num * chunk_ba_num +
|
|
mhop.l1_idx * chunk_ba_num + mhop.l2_idx;
|
|
bt_l1_idx = mhop.l0_idx * chunk_ba_num + mhop.l1_idx;
|
|
bt_l0_idx = mhop.l0_idx;
|
|
break;
|
|
case 2:
|
|
hem_idx = mhop.l0_idx * chunk_ba_num + mhop.l1_idx;
|
|
bt_l0_idx = mhop.l0_idx;
|
|
break;
|
|
case 1:
|
|
hem_idx = mhop.l0_idx;
|
|
break;
|
|
default:
|
|
dev_err(dev, "Table %d not support hop_num = %d!\n",
|
|
table->type, hop_num);
|
|
return -EINVAL;
|
|
}
|
|
|
|
mutex_lock(&table->mutex);
|
|
|
|
if (table->hem[hem_idx]) {
|
|
++table->hem[hem_idx]->refcount;
|
|
goto out;
|
|
}
|
|
|
|
/* alloc L1 BA's chunk */
|
|
if ((check_whether_bt_num_3(table->type, hop_num) ||
|
|
check_whether_bt_num_2(table->type, hop_num)) &&
|
|
!table->bt_l0[bt_l0_idx]) {
|
|
table->bt_l0[bt_l0_idx] = dma_alloc_coherent(dev, bt_chunk_size,
|
|
&(table->bt_l0_dma_addr[bt_l0_idx]),
|
|
GFP_KERNEL);
|
|
if (!table->bt_l0[bt_l0_idx]) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
bt_l0_allocated = 1;
|
|
|
|
/* set base address to hardware */
|
|
if (table->type < HEM_TYPE_MTT) {
|
|
step_idx = 0;
|
|
if (hr_dev->hw->set_hem(hr_dev, table, obj, step_idx)) {
|
|
ret = -ENODEV;
|
|
dev_err(dev, "set HEM base address to HW failed!\n");
|
|
goto err_dma_alloc_l1;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* alloc L2 BA's chunk */
|
|
if (check_whether_bt_num_3(table->type, hop_num) &&
|
|
!table->bt_l1[bt_l1_idx]) {
|
|
table->bt_l1[bt_l1_idx] = dma_alloc_coherent(dev, bt_chunk_size,
|
|
&(table->bt_l1_dma_addr[bt_l1_idx]),
|
|
GFP_KERNEL);
|
|
if (!table->bt_l1[bt_l1_idx]) {
|
|
ret = -ENOMEM;
|
|
goto err_dma_alloc_l1;
|
|
}
|
|
bt_l1_allocated = 1;
|
|
*(table->bt_l0[bt_l0_idx] + mhop.l1_idx) =
|
|
table->bt_l1_dma_addr[bt_l1_idx];
|
|
|
|
/* set base address to hardware */
|
|
step_idx = 1;
|
|
if (hr_dev->hw->set_hem(hr_dev, table, obj, step_idx)) {
|
|
ret = -ENODEV;
|
|
dev_err(dev, "set HEM base address to HW failed!\n");
|
|
goto err_alloc_hem_buf;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* alloc buffer space chunk for QPC/MTPT/CQC/SRQC/SCCC.
|
|
* alloc bt space chunk for MTT/CQE.
|
|
*/
|
|
size = table->type < HEM_TYPE_MTT ? buf_chunk_size : bt_chunk_size;
|
|
table->hem[hem_idx] = hns_roce_alloc_hem(hr_dev,
|
|
size >> PAGE_SHIFT,
|
|
size,
|
|
(table->lowmem ? GFP_KERNEL :
|
|
GFP_HIGHUSER) | __GFP_NOWARN);
|
|
if (!table->hem[hem_idx]) {
|
|
ret = -ENOMEM;
|
|
goto err_alloc_hem_buf;
|
|
}
|
|
|
|
hns_roce_hem_first(table->hem[hem_idx], &iter);
|
|
bt_ba = hns_roce_hem_addr(&iter);
|
|
|
|
if (table->type < HEM_TYPE_MTT) {
|
|
if (hop_num == 2) {
|
|
*(table->bt_l1[bt_l1_idx] + mhop.l2_idx) = bt_ba;
|
|
step_idx = 2;
|
|
} else if (hop_num == 1) {
|
|
*(table->bt_l0[bt_l0_idx] + mhop.l1_idx) = bt_ba;
|
|
step_idx = 1;
|
|
} else if (hop_num == HNS_ROCE_HOP_NUM_0) {
|
|
step_idx = 0;
|
|
} else {
|
|
ret = -EINVAL;
|
|
goto err_dma_alloc_l1;
|
|
}
|
|
|
|
/* set HEM base address to hardware */
|
|
if (hr_dev->hw->set_hem(hr_dev, table, obj, step_idx)) {
|
|
ret = -ENODEV;
|
|
dev_err(dev, "set HEM base address to HW failed!\n");
|
|
goto err_alloc_hem_buf;
|
|
}
|
|
} else if (hop_num == 2) {
|
|
*(table->bt_l0[bt_l0_idx] + mhop.l1_idx) = bt_ba;
|
|
}
|
|
|
|
++table->hem[hem_idx]->refcount;
|
|
goto out;
|
|
|
|
err_alloc_hem_buf:
|
|
if (bt_l1_allocated) {
|
|
dma_free_coherent(dev, bt_chunk_size, table->bt_l1[bt_l1_idx],
|
|
table->bt_l1_dma_addr[bt_l1_idx]);
|
|
table->bt_l1[bt_l1_idx] = NULL;
|
|
}
|
|
|
|
err_dma_alloc_l1:
|
|
if (bt_l0_allocated) {
|
|
dma_free_coherent(dev, bt_chunk_size, table->bt_l0[bt_l0_idx],
|
|
table->bt_l0_dma_addr[bt_l0_idx]);
|
|
table->bt_l0[bt_l0_idx] = NULL;
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&table->mutex);
|
|
return ret;
|
|
}
|
|
|
|
int hns_roce_table_get(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table, unsigned long obj)
|
|
{
|
|
struct device *dev = hr_dev->dev;
|
|
int ret = 0;
|
|
unsigned long i;
|
|
|
|
if (hns_roce_check_whether_mhop(hr_dev, table->type))
|
|
return hns_roce_table_mhop_get(hr_dev, table, obj);
|
|
|
|
i = (obj & (table->num_obj - 1)) / (table->table_chunk_size /
|
|
table->obj_size);
|
|
|
|
mutex_lock(&table->mutex);
|
|
|
|
if (table->hem[i]) {
|
|
++table->hem[i]->refcount;
|
|
goto out;
|
|
}
|
|
|
|
table->hem[i] = hns_roce_alloc_hem(hr_dev,
|
|
table->table_chunk_size >> PAGE_SHIFT,
|
|
table->table_chunk_size,
|
|
(table->lowmem ? GFP_KERNEL :
|
|
GFP_HIGHUSER) | __GFP_NOWARN);
|
|
if (!table->hem[i]) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
/* Set HEM base address(128K/page, pa) to Hardware */
|
|
if (hns_roce_set_hem(hr_dev, table, obj)) {
|
|
hns_roce_free_hem(hr_dev, table->hem[i]);
|
|
table->hem[i] = NULL;
|
|
ret = -ENODEV;
|
|
dev_err(dev, "set HEM base address to HW failed.\n");
|
|
goto out;
|
|
}
|
|
|
|
++table->hem[i]->refcount;
|
|
out:
|
|
mutex_unlock(&table->mutex);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(hns_roce_table_get);
|
|
|
|
static void hns_roce_table_mhop_put(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table,
|
|
unsigned long obj,
|
|
int check_refcount)
|
|
{
|
|
struct device *dev = hr_dev->dev;
|
|
struct hns_roce_hem_mhop mhop;
|
|
unsigned long mhop_obj = obj;
|
|
u32 bt_chunk_size;
|
|
u32 chunk_ba_num;
|
|
u32 hop_num;
|
|
u32 start_idx;
|
|
u32 bt_num;
|
|
u64 hem_idx;
|
|
u64 bt_l1_idx = 0;
|
|
int ret;
|
|
|
|
ret = hns_roce_calc_hem_mhop(hr_dev, table, &mhop_obj, &mhop);
|
|
if (ret)
|
|
return;
|
|
|
|
bt_chunk_size = mhop.bt_chunk_size;
|
|
hop_num = mhop.hop_num;
|
|
chunk_ba_num = bt_chunk_size / 8;
|
|
|
|
bt_num = hns_roce_get_bt_num(table->type, hop_num);
|
|
switch (bt_num) {
|
|
case 3:
|
|
hem_idx = mhop.l0_idx * chunk_ba_num * chunk_ba_num +
|
|
mhop.l1_idx * chunk_ba_num + mhop.l2_idx;
|
|
bt_l1_idx = mhop.l0_idx * chunk_ba_num + mhop.l1_idx;
|
|
break;
|
|
case 2:
|
|
hem_idx = mhop.l0_idx * chunk_ba_num + mhop.l1_idx;
|
|
break;
|
|
case 1:
|
|
hem_idx = mhop.l0_idx;
|
|
break;
|
|
default:
|
|
dev_err(dev, "Table %d not support hop_num = %d!\n",
|
|
table->type, hop_num);
|
|
return;
|
|
}
|
|
|
|
mutex_lock(&table->mutex);
|
|
|
|
if (check_refcount && (--table->hem[hem_idx]->refcount > 0)) {
|
|
mutex_unlock(&table->mutex);
|
|
return;
|
|
}
|
|
|
|
if (table->type < HEM_TYPE_MTT && hop_num == 1) {
|
|
if (hr_dev->hw->clear_hem(hr_dev, table, obj, 1))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
} else if (table->type < HEM_TYPE_MTT && hop_num == 2) {
|
|
if (hr_dev->hw->clear_hem(hr_dev, table, obj, 2))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
} else if (table->type < HEM_TYPE_MTT &&
|
|
hop_num == HNS_ROCE_HOP_NUM_0) {
|
|
if (hr_dev->hw->clear_hem(hr_dev, table, obj, 0))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
}
|
|
|
|
/*
|
|
* free buffer space chunk for QPC/MTPT/CQC/SRQC/SCCC.
|
|
* free bt space chunk for MTT/CQE.
|
|
*/
|
|
hns_roce_free_hem(hr_dev, table->hem[hem_idx]);
|
|
table->hem[hem_idx] = NULL;
|
|
|
|
if (check_whether_bt_num_2(table->type, hop_num)) {
|
|
start_idx = mhop.l0_idx * chunk_ba_num;
|
|
if (hns_roce_check_hem_null(table->hem, start_idx,
|
|
chunk_ba_num)) {
|
|
if (table->type < HEM_TYPE_MTT &&
|
|
hr_dev->hw->clear_hem(hr_dev, table, obj, 0))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
|
|
dma_free_coherent(dev, bt_chunk_size,
|
|
table->bt_l0[mhop.l0_idx],
|
|
table->bt_l0_dma_addr[mhop.l0_idx]);
|
|
table->bt_l0[mhop.l0_idx] = NULL;
|
|
}
|
|
} else if (check_whether_bt_num_3(table->type, hop_num)) {
|
|
start_idx = mhop.l0_idx * chunk_ba_num * chunk_ba_num +
|
|
mhop.l1_idx * chunk_ba_num;
|
|
if (hns_roce_check_hem_null(table->hem, start_idx,
|
|
chunk_ba_num)) {
|
|
if (hr_dev->hw->clear_hem(hr_dev, table, obj, 1))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
|
|
dma_free_coherent(dev, bt_chunk_size,
|
|
table->bt_l1[bt_l1_idx],
|
|
table->bt_l1_dma_addr[bt_l1_idx]);
|
|
table->bt_l1[bt_l1_idx] = NULL;
|
|
|
|
start_idx = mhop.l0_idx * chunk_ba_num;
|
|
if (hns_roce_check_bt_null(table->bt_l1, start_idx,
|
|
chunk_ba_num)) {
|
|
if (hr_dev->hw->clear_hem(hr_dev, table, obj,
|
|
0))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
|
|
dma_free_coherent(dev, bt_chunk_size,
|
|
table->bt_l0[mhop.l0_idx],
|
|
table->bt_l0_dma_addr[mhop.l0_idx]);
|
|
table->bt_l0[mhop.l0_idx] = NULL;
|
|
}
|
|
}
|
|
}
|
|
|
|
mutex_unlock(&table->mutex);
|
|
}
|
|
|
|
void hns_roce_table_put(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table, unsigned long obj)
|
|
{
|
|
struct device *dev = hr_dev->dev;
|
|
unsigned long i;
|
|
|
|
if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
|
|
hns_roce_table_mhop_put(hr_dev, table, obj, 1);
|
|
return;
|
|
}
|
|
|
|
i = (obj & (table->num_obj - 1)) /
|
|
(table->table_chunk_size / table->obj_size);
|
|
|
|
mutex_lock(&table->mutex);
|
|
|
|
if (--table->hem[i]->refcount == 0) {
|
|
/* Clear HEM base address */
|
|
if (hr_dev->hw->clear_hem(hr_dev, table, obj, 0))
|
|
dev_warn(dev, "Clear HEM base address failed.\n");
|
|
|
|
hns_roce_free_hem(hr_dev, table->hem[i]);
|
|
table->hem[i] = NULL;
|
|
}
|
|
|
|
mutex_unlock(&table->mutex);
|
|
}
|
|
EXPORT_SYMBOL_GPL(hns_roce_table_put);
|
|
|
|
void *hns_roce_table_find(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table,
|
|
unsigned long obj, dma_addr_t *dma_handle)
|
|
{
|
|
struct hns_roce_hem_chunk *chunk;
|
|
struct hns_roce_hem_mhop mhop;
|
|
struct hns_roce_hem *hem;
|
|
void *addr = NULL;
|
|
unsigned long mhop_obj = obj;
|
|
unsigned long obj_per_chunk;
|
|
unsigned long idx_offset;
|
|
int offset, dma_offset;
|
|
int length;
|
|
int i, j;
|
|
u32 hem_idx = 0;
|
|
|
|
if (!table->lowmem)
|
|
return NULL;
|
|
|
|
mutex_lock(&table->mutex);
|
|
|
|
if (!hns_roce_check_whether_mhop(hr_dev, table->type)) {
|
|
obj_per_chunk = table->table_chunk_size / table->obj_size;
|
|
hem = table->hem[(obj & (table->num_obj - 1)) / obj_per_chunk];
|
|
idx_offset = (obj & (table->num_obj - 1)) % obj_per_chunk;
|
|
dma_offset = offset = idx_offset * table->obj_size;
|
|
} else {
|
|
hns_roce_calc_hem_mhop(hr_dev, table, &mhop_obj, &mhop);
|
|
/* mtt mhop */
|
|
i = mhop.l0_idx;
|
|
j = mhop.l1_idx;
|
|
if (mhop.hop_num == 2)
|
|
hem_idx = i * (mhop.bt_chunk_size / 8) + j;
|
|
else if (mhop.hop_num == 1 ||
|
|
mhop.hop_num == HNS_ROCE_HOP_NUM_0)
|
|
hem_idx = i;
|
|
|
|
hem = table->hem[hem_idx];
|
|
dma_offset = offset = (obj & (table->num_obj - 1)) *
|
|
table->obj_size % mhop.bt_chunk_size;
|
|
if (mhop.hop_num == 2)
|
|
dma_offset = offset = 0;
|
|
}
|
|
|
|
if (!hem)
|
|
goto out;
|
|
|
|
list_for_each_entry(chunk, &hem->chunk_list, list) {
|
|
for (i = 0; i < chunk->npages; ++i) {
|
|
length = sg_dma_len(&chunk->mem[i]);
|
|
if (dma_handle && dma_offset >= 0) {
|
|
if (length > (u32)dma_offset)
|
|
*dma_handle = sg_dma_address(
|
|
&chunk->mem[i]) + dma_offset;
|
|
dma_offset -= length;
|
|
}
|
|
|
|
if (length > (u32)offset) {
|
|
addr = chunk->buf[i] + offset;
|
|
goto out;
|
|
}
|
|
offset -= length;
|
|
}
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&table->mutex);
|
|
return addr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(hns_roce_table_find);
|
|
|
|
int hns_roce_table_get_range(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table,
|
|
unsigned long start, unsigned long end)
|
|
{
|
|
struct hns_roce_hem_mhop mhop;
|
|
unsigned long inc = table->table_chunk_size / table->obj_size;
|
|
unsigned long i;
|
|
int ret;
|
|
|
|
if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
|
|
hns_roce_calc_hem_mhop(hr_dev, table, NULL, &mhop);
|
|
inc = mhop.bt_chunk_size / table->obj_size;
|
|
}
|
|
|
|
/* Allocate MTT entry memory according to chunk(128K) */
|
|
for (i = start; i <= end; i += inc) {
|
|
ret = hns_roce_table_get(hr_dev, table, i);
|
|
if (ret)
|
|
goto fail;
|
|
}
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
while (i > start) {
|
|
i -= inc;
|
|
hns_roce_table_put(hr_dev, table, i);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
void hns_roce_table_put_range(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table,
|
|
unsigned long start, unsigned long end)
|
|
{
|
|
struct hns_roce_hem_mhop mhop;
|
|
unsigned long inc = table->table_chunk_size / table->obj_size;
|
|
unsigned long i;
|
|
|
|
if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
|
|
hns_roce_calc_hem_mhop(hr_dev, table, NULL, &mhop);
|
|
inc = mhop.bt_chunk_size / table->obj_size;
|
|
}
|
|
|
|
for (i = start; i <= end; i += inc)
|
|
hns_roce_table_put(hr_dev, table, i);
|
|
}
|
|
|
|
int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table, u32 type,
|
|
unsigned long obj_size, unsigned long nobj,
|
|
int use_lowmem)
|
|
{
|
|
struct device *dev = hr_dev->dev;
|
|
unsigned long obj_per_chunk;
|
|
unsigned long num_hem;
|
|
|
|
if (!hns_roce_check_whether_mhop(hr_dev, type)) {
|
|
table->table_chunk_size = hr_dev->caps.chunk_sz;
|
|
obj_per_chunk = table->table_chunk_size / obj_size;
|
|
num_hem = (nobj + obj_per_chunk - 1) / obj_per_chunk;
|
|
|
|
table->hem = kcalloc(num_hem, sizeof(*table->hem), GFP_KERNEL);
|
|
if (!table->hem)
|
|
return -ENOMEM;
|
|
} else {
|
|
unsigned long buf_chunk_size;
|
|
unsigned long bt_chunk_size;
|
|
unsigned long bt_chunk_num;
|
|
unsigned long num_bt_l0 = 0;
|
|
u32 hop_num;
|
|
|
|
switch (type) {
|
|
case HEM_TYPE_QPC:
|
|
buf_chunk_size = 1 << (hr_dev->caps.qpc_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.qpc_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.qpc_bt_num;
|
|
hop_num = hr_dev->caps.qpc_hop_num;
|
|
break;
|
|
case HEM_TYPE_MTPT:
|
|
buf_chunk_size = 1 << (hr_dev->caps.mpt_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.mpt_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.mpt_bt_num;
|
|
hop_num = hr_dev->caps.mpt_hop_num;
|
|
break;
|
|
case HEM_TYPE_CQC:
|
|
buf_chunk_size = 1 << (hr_dev->caps.cqc_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.cqc_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.cqc_bt_num;
|
|
hop_num = hr_dev->caps.cqc_hop_num;
|
|
break;
|
|
case HEM_TYPE_SCCC:
|
|
buf_chunk_size = 1 << (hr_dev->caps.sccc_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.sccc_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.sccc_bt_num;
|
|
hop_num = hr_dev->caps.sccc_hop_num;
|
|
break;
|
|
case HEM_TYPE_QPC_TIMER:
|
|
buf_chunk_size = 1 << (hr_dev->caps.qpc_timer_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.qpc_timer_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.qpc_timer_bt_num;
|
|
hop_num = hr_dev->caps.qpc_timer_hop_num;
|
|
break;
|
|
case HEM_TYPE_CQC_TIMER:
|
|
buf_chunk_size = 1 << (hr_dev->caps.cqc_timer_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.cqc_timer_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.cqc_timer_bt_num;
|
|
hop_num = hr_dev->caps.cqc_timer_hop_num;
|
|
break;
|
|
case HEM_TYPE_SRQC:
|
|
buf_chunk_size = 1 << (hr_dev->caps.srqc_buf_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = 1 << (hr_dev->caps.srqc_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
num_bt_l0 = hr_dev->caps.srqc_bt_num;
|
|
hop_num = hr_dev->caps.srqc_hop_num;
|
|
break;
|
|
case HEM_TYPE_MTT:
|
|
buf_chunk_size = 1 << (hr_dev->caps.mtt_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = buf_chunk_size;
|
|
hop_num = hr_dev->caps.mtt_hop_num;
|
|
break;
|
|
case HEM_TYPE_CQE:
|
|
buf_chunk_size = 1 << (hr_dev->caps.cqe_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = buf_chunk_size;
|
|
hop_num = hr_dev->caps.cqe_hop_num;
|
|
break;
|
|
case HEM_TYPE_SRQWQE:
|
|
buf_chunk_size = 1 << (hr_dev->caps.srqwqe_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = buf_chunk_size;
|
|
hop_num = hr_dev->caps.srqwqe_hop_num;
|
|
break;
|
|
case HEM_TYPE_IDX:
|
|
buf_chunk_size = 1 << (hr_dev->caps.idx_ba_pg_sz
|
|
+ PAGE_SHIFT);
|
|
bt_chunk_size = buf_chunk_size;
|
|
hop_num = hr_dev->caps.idx_hop_num;
|
|
break;
|
|
default:
|
|
dev_err(dev,
|
|
"Table %d not support to init hem table here!\n",
|
|
type);
|
|
return -EINVAL;
|
|
}
|
|
obj_per_chunk = buf_chunk_size / obj_size;
|
|
num_hem = (nobj + obj_per_chunk - 1) / obj_per_chunk;
|
|
bt_chunk_num = bt_chunk_size / 8;
|
|
if (type >= HEM_TYPE_MTT)
|
|
num_bt_l0 = bt_chunk_num;
|
|
|
|
table->hem = kcalloc(num_hem, sizeof(*table->hem),
|
|
GFP_KERNEL);
|
|
if (!table->hem)
|
|
goto err_kcalloc_hem_buf;
|
|
|
|
if (check_whether_bt_num_3(type, hop_num)) {
|
|
unsigned long num_bt_l1;
|
|
|
|
num_bt_l1 = (num_hem + bt_chunk_num - 1) /
|
|
bt_chunk_num;
|
|
table->bt_l1 = kcalloc(num_bt_l1,
|
|
sizeof(*table->bt_l1),
|
|
GFP_KERNEL);
|
|
if (!table->bt_l1)
|
|
goto err_kcalloc_bt_l1;
|
|
|
|
table->bt_l1_dma_addr = kcalloc(num_bt_l1,
|
|
sizeof(*table->bt_l1_dma_addr),
|
|
GFP_KERNEL);
|
|
|
|
if (!table->bt_l1_dma_addr)
|
|
goto err_kcalloc_l1_dma;
|
|
}
|
|
|
|
if (check_whether_bt_num_2(type, hop_num) ||
|
|
check_whether_bt_num_3(type, hop_num)) {
|
|
table->bt_l0 = kcalloc(num_bt_l0, sizeof(*table->bt_l0),
|
|
GFP_KERNEL);
|
|
if (!table->bt_l0)
|
|
goto err_kcalloc_bt_l0;
|
|
|
|
table->bt_l0_dma_addr = kcalloc(num_bt_l0,
|
|
sizeof(*table->bt_l0_dma_addr),
|
|
GFP_KERNEL);
|
|
if (!table->bt_l0_dma_addr)
|
|
goto err_kcalloc_l0_dma;
|
|
}
|
|
}
|
|
|
|
table->type = type;
|
|
table->num_hem = num_hem;
|
|
table->num_obj = nobj;
|
|
table->obj_size = obj_size;
|
|
table->lowmem = use_lowmem;
|
|
mutex_init(&table->mutex);
|
|
|
|
return 0;
|
|
|
|
err_kcalloc_l0_dma:
|
|
kfree(table->bt_l0);
|
|
table->bt_l0 = NULL;
|
|
|
|
err_kcalloc_bt_l0:
|
|
kfree(table->bt_l1_dma_addr);
|
|
table->bt_l1_dma_addr = NULL;
|
|
|
|
err_kcalloc_l1_dma:
|
|
kfree(table->bt_l1);
|
|
table->bt_l1 = NULL;
|
|
|
|
err_kcalloc_bt_l1:
|
|
kfree(table->hem);
|
|
table->hem = NULL;
|
|
|
|
err_kcalloc_hem_buf:
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static void hns_roce_cleanup_mhop_hem_table(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table)
|
|
{
|
|
struct hns_roce_hem_mhop mhop;
|
|
u32 buf_chunk_size;
|
|
int i;
|
|
u64 obj;
|
|
|
|
hns_roce_calc_hem_mhop(hr_dev, table, NULL, &mhop);
|
|
buf_chunk_size = table->type < HEM_TYPE_MTT ? mhop.buf_chunk_size :
|
|
mhop.bt_chunk_size;
|
|
|
|
for (i = 0; i < table->num_hem; ++i) {
|
|
obj = i * buf_chunk_size / table->obj_size;
|
|
if (table->hem[i])
|
|
hns_roce_table_mhop_put(hr_dev, table, obj, 0);
|
|
}
|
|
|
|
kfree(table->hem);
|
|
table->hem = NULL;
|
|
kfree(table->bt_l1);
|
|
table->bt_l1 = NULL;
|
|
kfree(table->bt_l1_dma_addr);
|
|
table->bt_l1_dma_addr = NULL;
|
|
kfree(table->bt_l0);
|
|
table->bt_l0 = NULL;
|
|
kfree(table->bt_l0_dma_addr);
|
|
table->bt_l0_dma_addr = NULL;
|
|
}
|
|
|
|
void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
|
|
struct hns_roce_hem_table *table)
|
|
{
|
|
struct device *dev = hr_dev->dev;
|
|
unsigned long i;
|
|
|
|
if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
|
|
hns_roce_cleanup_mhop_hem_table(hr_dev, table);
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < table->num_hem; ++i)
|
|
if (table->hem[i]) {
|
|
if (hr_dev->hw->clear_hem(hr_dev, table,
|
|
i * table->table_chunk_size / table->obj_size, 0))
|
|
dev_err(dev, "Clear HEM base address failed.\n");
|
|
|
|
hns_roce_free_hem(hr_dev, table->hem[i]);
|
|
}
|
|
|
|
kfree(table->hem);
|
|
}
|
|
|
|
void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev)
|
|
{
|
|
if ((hr_dev->caps.num_idx_segs))
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->mr_table.mtt_idx_table);
|
|
if (hr_dev->caps.num_srqwqe_segs)
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->mr_table.mtt_srqwqe_table);
|
|
if (hr_dev->caps.srqc_entry_sz)
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->srq_table.table);
|
|
hns_roce_cleanup_hem_table(hr_dev, &hr_dev->cq_table.table);
|
|
if (hr_dev->caps.qpc_timer_entry_sz)
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->qpc_timer_table);
|
|
if (hr_dev->caps.cqc_timer_entry_sz)
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->cqc_timer_table);
|
|
if (hr_dev->caps.sccc_entry_sz)
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->qp_table.sccc_table);
|
|
if (hr_dev->caps.trrl_entry_sz)
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->qp_table.trrl_table);
|
|
hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
|
|
hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
|
|
hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
|
|
if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE))
|
|
hns_roce_cleanup_hem_table(hr_dev,
|
|
&hr_dev->mr_table.mtt_cqe_table);
|
|
hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
|
|
}
|