mirror of https://gitee.com/openkylin/linux.git
269 lines
6.9 KiB
C
269 lines
6.9 KiB
C
/*
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* Copyright (c) 2008-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef DEBUG_H
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#define DEBUG_H
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#include "hw.h"
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#include "rc.h"
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struct ath_txq;
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struct ath_buf;
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#ifdef CONFIG_ATH9K_DEBUGFS
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#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
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#else
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#define TX_STAT_INC(q, c) do { } while (0)
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#endif
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#ifdef CONFIG_ATH9K_DEBUGFS
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/**
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* struct ath_interrupt_stats - Contains statistics about interrupts
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* @total: Total no. of interrupts generated so far
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* @rxok: RX with no errors
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* @rxlp: RX with low priority RX
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* @rxhp: RX with high priority, uapsd only
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* @rxeol: RX with no more RXDESC available
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* @rxorn: RX FIFO overrun
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* @txok: TX completed at the requested rate
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* @txurn: TX FIFO underrun
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* @mib: MIB regs reaching its threshold
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* @rxphyerr: RX with phy errors
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* @rx_keycache_miss: RX with key cache misses
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* @swba: Software Beacon Alert
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* @bmiss: Beacon Miss
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* @bnr: Beacon Not Ready
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* @cst: Carrier Sense TImeout
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* @gtt: Global TX Timeout
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* @tim: RX beacon TIM occurrence
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* @cabend: RX End of CAB traffic
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* @dtimsync: DTIM sync lossage
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* @dtim: RX Beacon with DTIM
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* @bb_watchdog: Baseband watchdog
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* @tsfoor: TSF out of range, indicates that the corrected TSF received
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* from a beacon differs from the PCU's internal TSF by more than a
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* (programmable) threshold
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*/
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struct ath_interrupt_stats {
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u32 total;
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u32 rxok;
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u32 rxlp;
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u32 rxhp;
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u32 rxeol;
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u32 rxorn;
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u32 txok;
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u32 txeol;
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u32 txurn;
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u32 mib;
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u32 rxphyerr;
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u32 rx_keycache_miss;
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u32 swba;
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u32 bmiss;
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u32 bnr;
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u32 cst;
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u32 gtt;
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u32 tim;
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u32 cabend;
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u32 dtimsync;
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u32 dtim;
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u32 bb_watchdog;
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u32 tsfoor;
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};
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/**
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* struct ath_tx_stats - Statistics about TX
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* @tx_pkts_all: No. of total frames transmitted, including ones that
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may have had errors.
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* @tx_bytes_all: No. of total bytes transmitted, including ones that
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may have had errors.
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* @queued: Total MPDUs (non-aggr) queued
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* @completed: Total MPDUs (non-aggr) completed
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* @a_aggr: Total no. of aggregates queued
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* @a_queued_hw: Total AMPDUs queued to hardware
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* @a_queued_sw: Total AMPDUs queued to software queues
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* @a_completed: Total AMPDUs completed
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* @a_retries: No. of AMPDUs retried (SW)
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* @a_xretries: No. of AMPDUs dropped due to xretries
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* @fifo_underrun: FIFO underrun occurrences
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Valid only for:
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- non-aggregate condition.
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- first packet of aggregate.
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* @xtxop: No. of frames filtered because of TXOP limit
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* @timer_exp: Transmit timer expiry
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* @desc_cfg_err: Descriptor configuration errors
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* @data_urn: TX data underrun errors
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* @delim_urn: TX delimiter underrun errors
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* @puttxbuf: Number of times hardware was given txbuf to write.
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* @txstart: Number of times hardware was told to start tx.
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* @txprocdesc: Number of times tx descriptor was processed
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*/
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struct ath_tx_stats {
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u32 tx_pkts_all;
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u32 tx_bytes_all;
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u32 queued;
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u32 completed;
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u32 xretries;
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u32 a_aggr;
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u32 a_queued_hw;
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u32 a_queued_sw;
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u32 a_completed;
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u32 a_retries;
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u32 a_xretries;
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u32 fifo_underrun;
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u32 xtxop;
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u32 timer_exp;
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u32 desc_cfg_err;
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u32 data_underrun;
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u32 delim_underrun;
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u32 puttxbuf;
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u32 txstart;
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u32 txprocdesc;
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};
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/**
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* struct ath_rx_stats - RX Statistics
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* @rx_pkts_all: No. of total frames received, including ones that
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may have had errors.
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* @rx_bytes_all: No. of total bytes received, including ones that
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may have had errors.
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* @crc_err: No. of frames with incorrect CRC value
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* @decrypt_crc_err: No. of frames whose CRC check failed after
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decryption process completed
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* @phy_err: No. of frames whose reception failed because the PHY
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encountered an error
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* @mic_err: No. of frames with incorrect TKIP MIC verification failure
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* @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
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* @post_delim_crc_err: Post-Frame delimiter CRC error detections
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* @decrypt_busy_err: Decryption interruptions counter
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* @phy_err_stats: Individual PHY error statistics
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*/
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struct ath_rx_stats {
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u32 rx_pkts_all;
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u32 rx_bytes_all;
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u32 crc_err;
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u32 decrypt_crc_err;
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u32 phy_err;
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u32 mic_err;
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u32 pre_delim_crc_err;
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u32 post_delim_crc_err;
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u32 decrypt_busy_err;
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u32 phy_err_stats[ATH9K_PHYERR_MAX];
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int8_t rs_rssi_ctl0;
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int8_t rs_rssi_ctl1;
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int8_t rs_rssi_ctl2;
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int8_t rs_rssi_ext0;
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int8_t rs_rssi_ext1;
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int8_t rs_rssi_ext2;
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u8 rs_antenna;
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};
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struct ath_stats {
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struct ath_interrupt_stats istats;
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struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
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struct ath_rx_stats rxstats;
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};
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#define ATH_DBG_MAX_SAMPLES 10
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struct ath_dbg_bb_mac_samp {
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u32 dma_dbg_reg_vals[ATH9K_NUM_DMA_DEBUG_REGS];
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u32 pcu_obs, pcu_cr, noise;
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struct {
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u64 jiffies;
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int8_t rssi_ctl0;
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int8_t rssi_ctl1;
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int8_t rssi_ctl2;
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int8_t rssi_ext0;
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int8_t rssi_ext1;
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int8_t rssi_ext2;
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int8_t rssi;
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bool isok;
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u8 rts_fail_cnt;
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u8 data_fail_cnt;
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u8 rateindex;
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u8 qid;
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u8 tid;
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} ts[ATH_DBG_MAX_SAMPLES];
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struct {
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u64 jiffies;
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int8_t rssi_ctl0;
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int8_t rssi_ctl1;
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int8_t rssi_ctl2;
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int8_t rssi_ext0;
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int8_t rssi_ext1;
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int8_t rssi_ext2;
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int8_t rssi;
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bool is_mybeacon;
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u8 antenna;
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u8 rate;
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} rs[ATH_DBG_MAX_SAMPLES];
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struct ath_cycle_counters cc;
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struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
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};
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struct ath9k_debug {
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struct dentry *debugfs_phy;
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u32 regidx;
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struct ath_stats stats;
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spinlock_t samp_lock;
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struct ath_dbg_bb_mac_samp bb_mac_samp[ATH_DBG_MAX_SAMPLES];
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u8 sampidx;
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u8 tsidx;
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u8 rsidx;
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};
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int ath9k_init_debug(struct ath_hw *ah);
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void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
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void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
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void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
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struct ath_tx_status *ts, struct ath_txq *txq,
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unsigned int flags);
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void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
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#else
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static inline int ath9k_init_debug(struct ath_hw *ah)
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{
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return 0;
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}
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static inline void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
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{
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}
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static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
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enum ath9k_int status)
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{
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}
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static inline void ath_debug_stat_tx(struct ath_softc *sc,
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struct ath_buf *bf,
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struct ath_tx_status *ts,
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struct ath_txq *txq,
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unsigned int flags)
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{
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}
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static inline void ath_debug_stat_rx(struct ath_softc *sc,
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struct ath_rx_status *rs)
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{
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}
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#endif /* CONFIG_ATH9K_DEBUGFS */
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#endif /* DEBUG_H */
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