mirror of https://gitee.com/openkylin/linux.git
527 lines
15 KiB
C
527 lines
15 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2007 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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Linux NICS <linux.nics@intel.com>
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include "ixgbe.h"
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#include "ixgbe_phy.h"
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#define IXGBE_82598_MAX_TX_QUEUES 32
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#define IXGBE_82598_MAX_RX_QUEUES 64
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#define IXGBE_82598_RAR_ENTRIES 16
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static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
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static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
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bool *autoneg);
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static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
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u32 *speed, bool *autoneg);
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static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
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static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
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static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
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bool *link_up);
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static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
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bool autoneg,
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bool autoneg_wait_to_complete);
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static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
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static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
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bool autoneg,
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bool autoneg_wait_to_complete);
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static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
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static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
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{
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hw->mac.num_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
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hw->mac.num_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
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hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
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/* PHY ops are filled in by default properly for Fiber only */
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if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
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hw->mac.ops.setup_link = &ixgbe_setup_copper_link_82598;
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hw->mac.ops.setup_link_speed = &ixgbe_setup_copper_link_speed_82598;
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hw->mac.ops.get_link_settings =
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&ixgbe_get_copper_link_settings_82598;
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/* Call PHY identify routine to get the phy type */
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ixgbe_identify_phy(hw);
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switch (hw->phy.type) {
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case ixgbe_phy_tn:
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hw->phy.ops.setup_link = &ixgbe_setup_tnx_phy_link;
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hw->phy.ops.check_link = &ixgbe_check_tnx_phy_link;
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hw->phy.ops.setup_link_speed =
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&ixgbe_setup_tnx_phy_link_speed;
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break;
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default:
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break;
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}
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}
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return 0;
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}
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/**
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* ixgbe_get_link_settings_82598 - Determines default link settings
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the default link settings by reading the AUTOC register.
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**/
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static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
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bool *autoneg)
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{
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s32 status = 0;
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s32 autoc_reg;
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autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
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if (hw->mac.link_settings_loaded) {
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autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
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autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
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autoc_reg |= hw->mac.link_attach_type;
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autoc_reg |= hw->mac.link_mode_select;
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}
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switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
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case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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*autoneg = false;
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break;
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case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
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*speed = IXGBE_LINK_SPEED_10GB_FULL;
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*autoneg = false;
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break;
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case IXGBE_AUTOC_LMS_1G_AN:
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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*autoneg = true;
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break;
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case IXGBE_AUTOC_LMS_KX4_AN:
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case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
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*speed = IXGBE_LINK_SPEED_UNKNOWN;
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if (autoc_reg & IXGBE_AUTOC_KX4_SUPP)
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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if (autoc_reg & IXGBE_AUTOC_KX_SUPP)
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*speed |= IXGBE_LINK_SPEED_1GB_FULL;
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*autoneg = true;
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break;
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default:
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status = IXGBE_ERR_LINK_SETUP;
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break;
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}
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return status;
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}
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/**
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* ixgbe_get_copper_link_settings_82598 - Determines default link settings
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @autoneg: boolean auto-negotiation value
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*
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* Determines the default link settings by reading the AUTOC register.
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**/
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static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
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u32 *speed, bool *autoneg)
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{
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s32 status = IXGBE_ERR_LINK_SETUP;
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u16 speed_ability;
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*speed = 0;
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*autoneg = true;
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status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
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IXGBE_MDIO_PMA_PMD_DEV_TYPE,
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&speed_ability);
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if (status == 0) {
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if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
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*speed |= IXGBE_LINK_SPEED_10GB_FULL;
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if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G)
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*speed |= IXGBE_LINK_SPEED_1GB_FULL;
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}
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return status;
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}
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/**
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* ixgbe_get_media_type_82598 - Determines media type
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* @hw: pointer to hardware structure
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*
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* Returns the media type (fiber, copper, backplane)
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**/
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static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
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{
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enum ixgbe_media_type media_type;
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/* Media type for I82598 is based on device ID */
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switch (hw->device_id) {
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case IXGBE_DEV_ID_82598AF_DUAL_PORT:
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case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
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case IXGBE_DEV_ID_82598EB_CX4:
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media_type = ixgbe_media_type_fiber;
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break;
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case IXGBE_DEV_ID_82598AT_DUAL_PORT:
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media_type = ixgbe_media_type_copper;
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break;
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default:
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media_type = ixgbe_media_type_unknown;
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break;
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}
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return media_type;
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}
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/**
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* ixgbe_setup_mac_link_82598 - Configures MAC link settings
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* @hw: pointer to hardware structure
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*
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* Configures link settings based on values in the ixgbe_hw struct.
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* Restarts the link. Performs autonegotiation if needed.
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**/
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static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
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{
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u32 autoc_reg;
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u32 links_reg;
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u32 i;
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s32 status = 0;
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autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
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if (hw->mac.link_settings_loaded) {
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autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
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autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
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autoc_reg |= hw->mac.link_attach_type;
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autoc_reg |= hw->mac.link_mode_select;
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IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
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IXGBE_WRITE_FLUSH(hw);
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msleep(50);
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}
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/* Restart link */
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autoc_reg |= IXGBE_AUTOC_AN_RESTART;
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IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
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/* Only poll for autoneg to complete if specified to do so */
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if (hw->phy.autoneg_wait_to_complete) {
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if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN ||
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hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
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links_reg = 0; /* Just in case Autoneg time = 0 */
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for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
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links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
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if (links_reg & IXGBE_LINKS_KX_AN_COMP)
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break;
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msleep(100);
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}
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if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
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status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
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hw_dbg(hw,
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"Autonegotiation did not complete.\n");
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}
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}
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}
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/*
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* We want to save off the original Flow Control configuration just in
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* case we get disconnected and then reconnected into a different hub
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* or switch with different Flow Control capabilities.
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*/
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hw->fc.type = hw->fc.original_type;
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ixgbe_setup_fc(hw, 0);
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/* Add delay to filter out noises during initial link setup */
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msleep(50);
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return status;
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}
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/**
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* ixgbe_check_mac_link_82598 - Get link/speed status
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* @hw: pointer to hardware structure
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* @speed: pointer to link speed
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* @link_up: true is link is up, false otherwise
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*
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* Reads the links register to determine if link is up and the current speed
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**/
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static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
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bool *link_up)
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{
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u32 links_reg;
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links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
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if (links_reg & IXGBE_LINKS_UP)
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*link_up = true;
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else
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*link_up = false;
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if (links_reg & IXGBE_LINKS_SPEED)
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*speed = IXGBE_LINK_SPEED_10GB_FULL;
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else
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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return 0;
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}
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/**
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* ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
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* @hw: pointer to hardware structure
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* @speed: new link speed
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* @autoneg: true if auto-negotiation enabled
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* @autoneg_wait_to_complete: true if waiting is needed to complete
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*
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* Set the link speed in the AUTOC register and restarts link.
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**/
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static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
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u32 speed, bool autoneg,
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bool autoneg_wait_to_complete)
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{
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s32 status = 0;
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/* If speed is 10G, then check for CX4 or XAUI. */
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if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
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(!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4)))
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
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else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg))
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
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else if (autoneg) {
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/* BX mode - Autonegotiate 1G */
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if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD))
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN;
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else /* KX/KX4 mode */
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN;
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} else {
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status = IXGBE_ERR_LINK_SETUP;
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}
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if (status == 0) {
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hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete;
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hw->mac.link_settings_loaded = true;
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/*
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* Setup and restart the link based on the new values in
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* ixgbe_hw This will write the AUTOC register based on the new
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* stored values
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*/
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hw->mac.ops.setup_link(hw);
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}
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return status;
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}
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/**
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* ixgbe_setup_copper_link_82598 - Setup copper link settings
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* @hw: pointer to hardware structure
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*
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* Configures link settings based on values in the ixgbe_hw struct.
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* Restarts the link. Performs autonegotiation if needed. Restart
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* phy and wait for autonegotiate to finish. Then synchronize the
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* MAC and PHY.
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**/
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static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
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{
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s32 status = 0;
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/* Restart autonegotiation on PHY */
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if (hw->phy.ops.setup_link)
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status = hw->phy.ops.setup_link(hw);
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/* Set MAC to KX/KX4 autoneg, which defaultis to Parallel detection */
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hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
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/* Set up MAC */
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hw->mac.ops.setup_link(hw);
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return status;
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}
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/**
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* ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
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* @hw: pointer to hardware structure
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* @speed: new link speed
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* @autoneg: true if autonegotiation enabled
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* @autoneg_wait_to_complete: true if waiting is needed to complete
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*
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* Sets the link speed in the AUTOC register in the MAC and restarts link.
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**/
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static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
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bool autoneg,
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bool autoneg_wait_to_complete)
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{
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s32 status = 0;
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/* Setup the PHY according to input speed */
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if (hw->phy.ops.setup_link_speed)
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status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
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autoneg_wait_to_complete);
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/* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
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hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
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hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
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/* Set up MAC */
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hw->mac.ops.setup_link(hw);
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return status;
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}
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/**
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* ixgbe_reset_hw_82598 - Performs hardware reset
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* @hw: pointer to hardware structure
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*
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* Resets the hardware by reseting the transmit and receive units, masks and
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* clears all interrupts, performing a PHY reset, and performing a link (MAC)
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* reset.
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**/
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static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
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{
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s32 status = 0;
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u32 ctrl;
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u32 gheccr;
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u32 i;
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u32 autoc;
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u8 analog_val;
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/* Call adapter stop to disable tx/rx and clear interrupts */
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ixgbe_stop_adapter(hw);
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/*
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* Power up the Atlas TX lanes if they are currently powered down.
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* Atlas TX lanes are powered down for MAC loopback tests, but
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* they are not automatically restored on reset.
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*/
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ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
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if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
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/* Enable TX Atlas so packets can be transmitted again */
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ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
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analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN;
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ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, analog_val);
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ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &analog_val);
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analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
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ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, analog_val);
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ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &analog_val);
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analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
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ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, analog_val);
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ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &analog_val);
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analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
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ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, analog_val);
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}
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/* Reset PHY */
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ixgbe_reset_phy(hw);
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/*
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* Prevent the PCI-E bus from from hanging by disabling PCI-E master
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* access and verify no pending requests before reset
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*/
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if (ixgbe_disable_pcie_master(hw) != 0) {
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|
status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
|
|
hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
|
|
}
|
|
|
|
/*
|
|
* Issue global reset to the MAC. This needs to be a SW reset.
|
|
* If link reset is used, it might reset the MAC when mng is using it
|
|
*/
|
|
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
|
|
IXGBE_WRITE_FLUSH(hw);
|
|
|
|
/* Poll for reset bit to self-clear indicating reset is complete */
|
|
for (i = 0; i < 10; i++) {
|
|
udelay(1);
|
|
ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
|
|
if (!(ctrl & IXGBE_CTRL_RST))
|
|
break;
|
|
}
|
|
if (ctrl & IXGBE_CTRL_RST) {
|
|
status = IXGBE_ERR_RESET_FAILED;
|
|
hw_dbg(hw, "Reset polling failed to complete.\n");
|
|
}
|
|
|
|
msleep(50);
|
|
|
|
gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
|
|
gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
|
|
IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
|
|
|
|
/*
|
|
* AUTOC register which stores link settings gets cleared
|
|
* and reloaded from EEPROM after reset. We need to restore
|
|
* our stored value from init in case SW changed the attach
|
|
* type or speed. If this is the first time and link settings
|
|
* have not been stored, store default settings from AUTOC.
|
|
*/
|
|
autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
|
if (hw->mac.link_settings_loaded) {
|
|
autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
|
|
autoc &= ~(IXGBE_AUTOC_LMS_MASK);
|
|
autoc |= hw->mac.link_attach_type;
|
|
autoc |= hw->mac.link_mode_select;
|
|
IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
|
|
} else {
|
|
hw->mac.link_attach_type =
|
|
(autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
|
|
hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
|
|
hw->mac.link_settings_loaded = true;
|
|
}
|
|
|
|
/* Store the permanent mac address */
|
|
ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
|
|
|
|
return status;
|
|
}
|
|
|
|
static struct ixgbe_mac_operations mac_ops_82598 = {
|
|
.reset = &ixgbe_reset_hw_82598,
|
|
.get_media_type = &ixgbe_get_media_type_82598,
|
|
.setup_link = &ixgbe_setup_mac_link_82598,
|
|
.check_link = &ixgbe_check_mac_link_82598,
|
|
.setup_link_speed = &ixgbe_setup_mac_link_speed_82598,
|
|
.get_link_settings = &ixgbe_get_link_settings_82598,
|
|
};
|
|
|
|
struct ixgbe_info ixgbe_82598_info = {
|
|
.mac = ixgbe_mac_82598EB,
|
|
.get_invariants = &ixgbe_get_invariants_82598,
|
|
.mac_ops = &mac_ops_82598,
|
|
};
|
|
|