mirror of https://gitee.com/openkylin/linux.git
118 lines
3.0 KiB
C
118 lines
3.0 KiB
C
/*
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* Copyright 2014 Chen-Yu Tsai
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*
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* Chen-Yu Tsai <wens@csie.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/of_address.h>
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#define SUN8I_MBUS_ENABLE 31
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#define SUN8I_MBUS_MUX_SHIFT 24
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#define SUN8I_MBUS_MUX_MASK 0x3
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#define SUN8I_MBUS_DIV_SHIFT 0
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#define SUN8I_MBUS_DIV_WIDTH 3
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#define SUN8I_MBUS_MAX_PARENTS 4
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static DEFINE_SPINLOCK(sun8i_a23_mbus_lock);
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static void __init sun8i_a23_mbus_setup(struct device_node *node)
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{
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int num_parents = of_clk_get_parent_count(node);
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const char **parents;
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const char *clk_name = node->name;
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struct resource res;
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struct clk_divider *div;
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struct clk_gate *gate;
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struct clk_mux *mux;
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struct clk *clk;
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void __iomem *reg;
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int err;
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parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL);
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if (!parents)
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return;
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reg = of_io_request_and_map(node, 0, of_node_full_name(node));
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if (IS_ERR(reg)) {
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pr_err("Could not get registers for sun8i-mbus-clk\n");
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goto err_free_parents;
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}
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div)
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goto err_unmap;
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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goto err_free_div;
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate)
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goto err_free_mux;
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of_property_read_string(node, "clock-output-names", &clk_name);
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of_clk_parent_fill(node, parents, num_parents);
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gate->reg = reg;
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gate->bit_idx = SUN8I_MBUS_ENABLE;
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gate->lock = &sun8i_a23_mbus_lock;
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div->reg = reg;
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div->shift = SUN8I_MBUS_DIV_SHIFT;
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div->width = SUN8I_MBUS_DIV_WIDTH;
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div->lock = &sun8i_a23_mbus_lock;
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mux->reg = reg;
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mux->shift = SUN8I_MBUS_MUX_SHIFT;
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mux->mask = SUN8I_MBUS_MUX_MASK;
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mux->lock = &sun8i_a23_mbus_lock;
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/* The MBUS clocks needs to be always enabled */
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clk = clk_register_composite(NULL, clk_name, parents, num_parents,
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&mux->hw, &clk_mux_ops,
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&div->hw, &clk_divider_ops,
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&gate->hw, &clk_gate_ops,
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CLK_IS_CRITICAL);
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if (IS_ERR(clk))
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goto err_free_gate;
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err = of_clk_add_provider(node, of_clk_src_simple_get, clk);
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if (err)
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goto err_unregister_clk;
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kfree(parents); /* parents is deep copied */
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return;
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err_unregister_clk:
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/* TODO: The composite clock stuff will leak a bit here. */
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clk_unregister(clk);
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err_free_gate:
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kfree(gate);
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err_free_mux:
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kfree(mux);
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err_free_div:
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kfree(div);
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err_unmap:
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iounmap(reg);
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of_address_to_resource(node, 0, &res);
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release_mem_region(res.start, resource_size(&res));
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err_free_parents:
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kfree(parents);
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}
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CLK_OF_DECLARE(sun8i_a23_mbus, "allwinner,sun8i-a23-mbus-clk", sun8i_a23_mbus_setup);
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