mirror of https://gitee.com/openkylin/linux.git
919 lines
23 KiB
C
919 lines
23 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Base driver for Maxim MAX8925
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*
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* Copyright (C) 2009-2010 Marvell International Ltd.
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* Haojian Zhuang <haojian.zhuang@marvell.com>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/machine.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/max8925.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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static struct resource bk_resources[] = {
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{ 0x84, 0x84, "mode control", IORESOURCE_REG, },
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{ 0x85, 0x85, "control", IORESOURCE_REG, },
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};
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static struct mfd_cell bk_devs[] = {
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{
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.name = "max8925-backlight",
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.num_resources = ARRAY_SIZE(bk_resources),
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.resources = &bk_resources[0],
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.id = -1,
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},
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};
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static struct resource touch_resources[] = {
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{
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.name = "max8925-tsc",
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.start = MAX8925_TSC_IRQ,
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.end = MAX8925_ADC_RES_END,
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.flags = IORESOURCE_REG,
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},
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};
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static const struct mfd_cell touch_devs[] = {
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{
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.name = "max8925-touch",
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.num_resources = 1,
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.resources = &touch_resources[0],
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.id = -1,
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},
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};
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static struct resource power_supply_resources[] = {
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{
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.name = "max8925-power",
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.start = MAX8925_CHG_IRQ1,
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.end = MAX8925_CHG_IRQ1_MASK,
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.flags = IORESOURCE_REG,
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},
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};
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static const struct mfd_cell power_devs[] = {
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{
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.name = "max8925-power",
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.num_resources = 1,
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.resources = &power_supply_resources[0],
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.id = -1,
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},
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};
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static struct resource rtc_resources[] = {
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{
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.name = "max8925-rtc",
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.start = MAX8925_IRQ_RTC_ALARM0,
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.end = MAX8925_IRQ_RTC_ALARM0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static const struct mfd_cell rtc_devs[] = {
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{
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.name = "max8925-rtc",
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.num_resources = 1,
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.resources = &rtc_resources[0],
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.id = -1,
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},
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};
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static struct resource onkey_resources[] = {
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{
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.name = "max8925-onkey",
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.start = MAX8925_IRQ_GPM_SW_R,
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.end = MAX8925_IRQ_GPM_SW_R,
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.flags = IORESOURCE_IRQ,
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}, {
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.name = "max8925-onkey",
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.start = MAX8925_IRQ_GPM_SW_F,
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.end = MAX8925_IRQ_GPM_SW_F,
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.flags = IORESOURCE_IRQ,
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},
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};
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static const struct mfd_cell onkey_devs[] = {
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{
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.name = "max8925-onkey",
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.num_resources = 2,
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.resources = &onkey_resources[0],
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.id = -1,
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},
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};
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static struct resource sd1_resources[] = {
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{0x06, 0x06, "sdv", IORESOURCE_REG, },
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};
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static struct resource sd2_resources[] = {
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{0x09, 0x09, "sdv", IORESOURCE_REG, },
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};
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static struct resource sd3_resources[] = {
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{0x0c, 0x0c, "sdv", IORESOURCE_REG, },
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};
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static struct resource ldo1_resources[] = {
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{0x1a, 0x1a, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo2_resources[] = {
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{0x1e, 0x1e, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo3_resources[] = {
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{0x22, 0x22, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo4_resources[] = {
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{0x26, 0x26, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo5_resources[] = {
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{0x2a, 0x2a, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo6_resources[] = {
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{0x2e, 0x2e, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo7_resources[] = {
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{0x32, 0x32, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo8_resources[] = {
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{0x36, 0x36, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo9_resources[] = {
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{0x3a, 0x3a, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo10_resources[] = {
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{0x3e, 0x3e, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo11_resources[] = {
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{0x42, 0x42, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo12_resources[] = {
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{0x46, 0x46, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo13_resources[] = {
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{0x4a, 0x4a, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo14_resources[] = {
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{0x4e, 0x4e, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo15_resources[] = {
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{0x52, 0x52, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo16_resources[] = {
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{0x12, 0x12, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo17_resources[] = {
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{0x16, 0x16, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo18_resources[] = {
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{0x74, 0x74, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo19_resources[] = {
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{0x5e, 0x5e, "ldov", IORESOURCE_REG, },
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};
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static struct resource ldo20_resources[] = {
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{0x9e, 0x9e, "ldov", IORESOURCE_REG, },
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};
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static struct mfd_cell reg_devs[] = {
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{
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.name = "max8925-regulator",
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.id = 0,
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.num_resources = ARRAY_SIZE(sd1_resources),
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.resources = sd1_resources,
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}, {
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.name = "max8925-regulator",
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.id = 1,
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.num_resources = ARRAY_SIZE(sd2_resources),
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.resources = sd2_resources,
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}, {
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.name = "max8925-regulator",
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.id = 2,
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.num_resources = ARRAY_SIZE(sd3_resources),
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.resources = sd3_resources,
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}, {
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.name = "max8925-regulator",
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.id = 3,
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.num_resources = ARRAY_SIZE(ldo1_resources),
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.resources = ldo1_resources,
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}, {
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.name = "max8925-regulator",
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.id = 4,
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.num_resources = ARRAY_SIZE(ldo2_resources),
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.resources = ldo2_resources,
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}, {
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.name = "max8925-regulator",
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.id = 5,
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.num_resources = ARRAY_SIZE(ldo3_resources),
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.resources = ldo3_resources,
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}, {
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.name = "max8925-regulator",
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.id = 6,
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.num_resources = ARRAY_SIZE(ldo4_resources),
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.resources = ldo4_resources,
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}, {
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.name = "max8925-regulator",
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.id = 7,
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.num_resources = ARRAY_SIZE(ldo5_resources),
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.resources = ldo5_resources,
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}, {
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.name = "max8925-regulator",
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.id = 8,
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.num_resources = ARRAY_SIZE(ldo6_resources),
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.resources = ldo6_resources,
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}, {
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.name = "max8925-regulator",
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.id = 9,
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.num_resources = ARRAY_SIZE(ldo7_resources),
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.resources = ldo7_resources,
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}, {
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.name = "max8925-regulator",
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.id = 10,
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.num_resources = ARRAY_SIZE(ldo8_resources),
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.resources = ldo8_resources,
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}, {
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.name = "max8925-regulator",
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.id = 11,
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.num_resources = ARRAY_SIZE(ldo9_resources),
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.resources = ldo9_resources,
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}, {
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.name = "max8925-regulator",
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.id = 12,
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.num_resources = ARRAY_SIZE(ldo10_resources),
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.resources = ldo10_resources,
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}, {
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.name = "max8925-regulator",
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.id = 13,
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.num_resources = ARRAY_SIZE(ldo11_resources),
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.resources = ldo11_resources,
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}, {
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.name = "max8925-regulator",
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.id = 14,
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.num_resources = ARRAY_SIZE(ldo12_resources),
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.resources = ldo12_resources,
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}, {
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.name = "max8925-regulator",
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.id = 15,
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.num_resources = ARRAY_SIZE(ldo13_resources),
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.resources = ldo13_resources,
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}, {
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.name = "max8925-regulator",
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.id = 16,
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.num_resources = ARRAY_SIZE(ldo14_resources),
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.resources = ldo14_resources,
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}, {
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.name = "max8925-regulator",
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.id = 17,
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.num_resources = ARRAY_SIZE(ldo15_resources),
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.resources = ldo15_resources,
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}, {
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.name = "max8925-regulator",
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.id = 18,
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.num_resources = ARRAY_SIZE(ldo16_resources),
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.resources = ldo16_resources,
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}, {
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.name = "max8925-regulator",
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.id = 19,
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.num_resources = ARRAY_SIZE(ldo17_resources),
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.resources = ldo17_resources,
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}, {
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.name = "max8925-regulator",
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.id = 20,
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.num_resources = ARRAY_SIZE(ldo18_resources),
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.resources = ldo18_resources,
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}, {
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.name = "max8925-regulator",
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.id = 21,
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.num_resources = ARRAY_SIZE(ldo19_resources),
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.resources = ldo19_resources,
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}, {
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.name = "max8925-regulator",
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.id = 22,
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.num_resources = ARRAY_SIZE(ldo20_resources),
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.resources = ldo20_resources,
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},
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};
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enum {
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FLAGS_ADC = 1, /* register in ADC component */
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FLAGS_RTC, /* register in RTC component */
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};
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struct max8925_irq_data {
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int reg;
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int mask_reg;
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int enable; /* enable or not */
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int offs; /* bit offset in mask register */
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int flags;
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int tsc_irq;
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};
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static struct max8925_irq_data max8925_irqs[] = {
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[MAX8925_IRQ_VCHG_DC_OVP] = {
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.reg = MAX8925_CHG_IRQ1,
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.mask_reg = MAX8925_CHG_IRQ1_MASK,
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.offs = 1 << 0,
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},
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[MAX8925_IRQ_VCHG_DC_F] = {
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.reg = MAX8925_CHG_IRQ1,
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.mask_reg = MAX8925_CHG_IRQ1_MASK,
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.offs = 1 << 1,
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},
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[MAX8925_IRQ_VCHG_DC_R] = {
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.reg = MAX8925_CHG_IRQ1,
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.mask_reg = MAX8925_CHG_IRQ1_MASK,
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.offs = 1 << 2,
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},
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[MAX8925_IRQ_VCHG_THM_OK_R] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 0,
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},
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[MAX8925_IRQ_VCHG_THM_OK_F] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 1,
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},
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[MAX8925_IRQ_VCHG_SYSLOW_F] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 2,
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},
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[MAX8925_IRQ_VCHG_SYSLOW_R] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 3,
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},
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[MAX8925_IRQ_VCHG_RST] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 4,
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},
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[MAX8925_IRQ_VCHG_DONE] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 5,
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},
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[MAX8925_IRQ_VCHG_TOPOFF] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 6,
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},
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[MAX8925_IRQ_VCHG_TMR_FAULT] = {
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.reg = MAX8925_CHG_IRQ2,
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.mask_reg = MAX8925_CHG_IRQ2_MASK,
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.offs = 1 << 7,
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},
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[MAX8925_IRQ_GPM_RSTIN] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 0,
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},
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[MAX8925_IRQ_GPM_MPL] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 1,
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},
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[MAX8925_IRQ_GPM_SW_3SEC] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 2,
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},
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[MAX8925_IRQ_GPM_EXTON_F] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 3,
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},
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[MAX8925_IRQ_GPM_EXTON_R] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 4,
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},
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[MAX8925_IRQ_GPM_SW_1SEC] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 5,
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},
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[MAX8925_IRQ_GPM_SW_F] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 6,
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},
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[MAX8925_IRQ_GPM_SW_R] = {
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.reg = MAX8925_ON_OFF_IRQ1,
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.mask_reg = MAX8925_ON_OFF_IRQ1_MASK,
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.offs = 1 << 7,
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},
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[MAX8925_IRQ_GPM_SYSCKEN_F] = {
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.reg = MAX8925_ON_OFF_IRQ2,
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.mask_reg = MAX8925_ON_OFF_IRQ2_MASK,
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.offs = 1 << 0,
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},
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[MAX8925_IRQ_GPM_SYSCKEN_R] = {
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.reg = MAX8925_ON_OFF_IRQ2,
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.mask_reg = MAX8925_ON_OFF_IRQ2_MASK,
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.offs = 1 << 1,
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},
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[MAX8925_IRQ_RTC_ALARM1] = {
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.reg = MAX8925_RTC_IRQ,
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.mask_reg = MAX8925_RTC_IRQ_MASK,
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.offs = 1 << 2,
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.flags = FLAGS_RTC,
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},
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[MAX8925_IRQ_RTC_ALARM0] = {
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.reg = MAX8925_RTC_IRQ,
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.mask_reg = MAX8925_RTC_IRQ_MASK,
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.offs = 1 << 3,
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.flags = FLAGS_RTC,
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},
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[MAX8925_IRQ_TSC_STICK] = {
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.reg = MAX8925_TSC_IRQ,
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.mask_reg = MAX8925_TSC_IRQ_MASK,
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.offs = 1 << 0,
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.flags = FLAGS_ADC,
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.tsc_irq = 1,
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},
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[MAX8925_IRQ_TSC_NSTICK] = {
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.reg = MAX8925_TSC_IRQ,
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.mask_reg = MAX8925_TSC_IRQ_MASK,
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.offs = 1 << 1,
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.flags = FLAGS_ADC,
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.tsc_irq = 1,
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},
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};
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static inline struct max8925_irq_data *irq_to_max8925(struct max8925_chip *chip,
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int irq)
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{
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return &max8925_irqs[irq - chip->irq_base];
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}
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static irqreturn_t max8925_irq(int irq, void *data)
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{
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struct max8925_chip *chip = data;
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struct max8925_irq_data *irq_data;
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struct i2c_client *i2c;
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int read_reg = -1, value = 0;
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int i;
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for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
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irq_data = &max8925_irqs[i];
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/* TSC IRQ should be serviced in max8925_tsc_irq() */
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if (irq_data->tsc_irq)
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continue;
|
|
if (irq_data->flags == FLAGS_RTC)
|
|
i2c = chip->rtc;
|
|
else if (irq_data->flags == FLAGS_ADC)
|
|
i2c = chip->adc;
|
|
else
|
|
i2c = chip->i2c;
|
|
if (read_reg != irq_data->reg) {
|
|
read_reg = irq_data->reg;
|
|
value = max8925_reg_read(i2c, irq_data->reg);
|
|
}
|
|
if (value & irq_data->enable)
|
|
handle_nested_irq(chip->irq_base + i);
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t max8925_tsc_irq(int irq, void *data)
|
|
{
|
|
struct max8925_chip *chip = data;
|
|
struct max8925_irq_data *irq_data;
|
|
struct i2c_client *i2c;
|
|
int read_reg = -1, value = 0;
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
|
|
irq_data = &max8925_irqs[i];
|
|
/* non TSC IRQ should be serviced in max8925_irq() */
|
|
if (!irq_data->tsc_irq)
|
|
continue;
|
|
if (irq_data->flags == FLAGS_RTC)
|
|
i2c = chip->rtc;
|
|
else if (irq_data->flags == FLAGS_ADC)
|
|
i2c = chip->adc;
|
|
else
|
|
i2c = chip->i2c;
|
|
if (read_reg != irq_data->reg) {
|
|
read_reg = irq_data->reg;
|
|
value = max8925_reg_read(i2c, irq_data->reg);
|
|
}
|
|
if (value & irq_data->enable)
|
|
handle_nested_irq(chip->irq_base + i);
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void max8925_irq_lock(struct irq_data *data)
|
|
{
|
|
struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
|
|
|
|
mutex_lock(&chip->irq_lock);
|
|
}
|
|
|
|
static void max8925_irq_sync_unlock(struct irq_data *data)
|
|
{
|
|
struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
|
|
struct max8925_irq_data *irq_data;
|
|
static unsigned char cache_chg[2] = {0xff, 0xff};
|
|
static unsigned char cache_on[2] = {0xff, 0xff};
|
|
static unsigned char cache_rtc = 0xff, cache_tsc = 0xff;
|
|
unsigned char irq_chg[2], irq_on[2];
|
|
unsigned char irq_rtc, irq_tsc;
|
|
int i;
|
|
|
|
/* Load cached value. In initial, all IRQs are masked */
|
|
irq_chg[0] = cache_chg[0];
|
|
irq_chg[1] = cache_chg[1];
|
|
irq_on[0] = cache_on[0];
|
|
irq_on[1] = cache_on[1];
|
|
irq_rtc = cache_rtc;
|
|
irq_tsc = cache_tsc;
|
|
for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
|
|
irq_data = &max8925_irqs[i];
|
|
/* 1 -- disable, 0 -- enable */
|
|
switch (irq_data->mask_reg) {
|
|
case MAX8925_CHG_IRQ1_MASK:
|
|
irq_chg[0] &= ~irq_data->enable;
|
|
break;
|
|
case MAX8925_CHG_IRQ2_MASK:
|
|
irq_chg[1] &= ~irq_data->enable;
|
|
break;
|
|
case MAX8925_ON_OFF_IRQ1_MASK:
|
|
irq_on[0] &= ~irq_data->enable;
|
|
break;
|
|
case MAX8925_ON_OFF_IRQ2_MASK:
|
|
irq_on[1] &= ~irq_data->enable;
|
|
break;
|
|
case MAX8925_RTC_IRQ_MASK:
|
|
irq_rtc &= ~irq_data->enable;
|
|
break;
|
|
case MAX8925_TSC_IRQ_MASK:
|
|
irq_tsc &= ~irq_data->enable;
|
|
break;
|
|
default:
|
|
dev_err(chip->dev, "wrong IRQ\n");
|
|
break;
|
|
}
|
|
}
|
|
/* update mask into registers */
|
|
if (cache_chg[0] != irq_chg[0]) {
|
|
cache_chg[0] = irq_chg[0];
|
|
max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK,
|
|
irq_chg[0]);
|
|
}
|
|
if (cache_chg[1] != irq_chg[1]) {
|
|
cache_chg[1] = irq_chg[1];
|
|
max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK,
|
|
irq_chg[1]);
|
|
}
|
|
if (cache_on[0] != irq_on[0]) {
|
|
cache_on[0] = irq_on[0];
|
|
max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK,
|
|
irq_on[0]);
|
|
}
|
|
if (cache_on[1] != irq_on[1]) {
|
|
cache_on[1] = irq_on[1];
|
|
max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK,
|
|
irq_on[1]);
|
|
}
|
|
if (cache_rtc != irq_rtc) {
|
|
cache_rtc = irq_rtc;
|
|
max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, irq_rtc);
|
|
}
|
|
if (cache_tsc != irq_tsc) {
|
|
cache_tsc = irq_tsc;
|
|
max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, irq_tsc);
|
|
}
|
|
|
|
mutex_unlock(&chip->irq_lock);
|
|
}
|
|
|
|
static void max8925_irq_enable(struct irq_data *data)
|
|
{
|
|
struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
|
|
|
|
max8925_irqs[data->irq - chip->irq_base].enable
|
|
= max8925_irqs[data->irq - chip->irq_base].offs;
|
|
}
|
|
|
|
static void max8925_irq_disable(struct irq_data *data)
|
|
{
|
|
struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
|
|
|
|
max8925_irqs[data->irq - chip->irq_base].enable = 0;
|
|
}
|
|
|
|
static struct irq_chip max8925_irq_chip = {
|
|
.name = "max8925",
|
|
.irq_bus_lock = max8925_irq_lock,
|
|
.irq_bus_sync_unlock = max8925_irq_sync_unlock,
|
|
.irq_enable = max8925_irq_enable,
|
|
.irq_disable = max8925_irq_disable,
|
|
};
|
|
|
|
static int max8925_irq_domain_map(struct irq_domain *d, unsigned int virq,
|
|
irq_hw_number_t hw)
|
|
{
|
|
irq_set_chip_data(virq, d->host_data);
|
|
irq_set_chip_and_handler(virq, &max8925_irq_chip, handle_edge_irq);
|
|
irq_set_nested_thread(virq, 1);
|
|
irq_set_noprobe(virq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct irq_domain_ops max8925_irq_domain_ops = {
|
|
.map = max8925_irq_domain_map,
|
|
.xlate = irq_domain_xlate_onetwocell,
|
|
};
|
|
|
|
|
|
static int max8925_irq_init(struct max8925_chip *chip, int irq,
|
|
struct max8925_platform_data *pdata)
|
|
{
|
|
unsigned long flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
|
|
int ret;
|
|
struct device_node *node = chip->dev->of_node;
|
|
|
|
/* clear all interrupts */
|
|
max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ1);
|
|
max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ2);
|
|
max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ1);
|
|
max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2);
|
|
max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ);
|
|
max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
|
|
/* mask all interrupts except for TSC */
|
|
max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0);
|
|
max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0);
|
|
max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff);
|
|
max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK, 0xff);
|
|
max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff);
|
|
max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff);
|
|
max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff);
|
|
|
|
mutex_init(&chip->irq_lock);
|
|
chip->irq_base = irq_alloc_descs(-1, 0, MAX8925_NR_IRQS, 0);
|
|
if (chip->irq_base < 0) {
|
|
dev_err(chip->dev, "Failed to allocate interrupts, ret:%d\n",
|
|
chip->irq_base);
|
|
return -EBUSY;
|
|
}
|
|
|
|
irq_domain_add_legacy(node, MAX8925_NR_IRQS, chip->irq_base, 0,
|
|
&max8925_irq_domain_ops, chip);
|
|
|
|
/* request irq handler for pmic main irq*/
|
|
chip->core_irq = irq;
|
|
if (!chip->core_irq)
|
|
return -EBUSY;
|
|
ret = request_threaded_irq(irq, NULL, max8925_irq, flags | IRQF_ONESHOT,
|
|
"max8925", chip);
|
|
if (ret) {
|
|
dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret);
|
|
chip->core_irq = 0;
|
|
return -EBUSY;
|
|
}
|
|
|
|
/* request irq handler for pmic tsc irq*/
|
|
|
|
/* mask TSC interrupt */
|
|
max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0x0f);
|
|
|
|
if (!pdata->tsc_irq) {
|
|
dev_warn(chip->dev, "No interrupt support on TSC IRQ\n");
|
|
return 0;
|
|
}
|
|
chip->tsc_irq = pdata->tsc_irq;
|
|
ret = request_threaded_irq(chip->tsc_irq, NULL, max8925_tsc_irq,
|
|
flags | IRQF_ONESHOT, "max8925-tsc", chip);
|
|
if (ret) {
|
|
dev_err(chip->dev, "Failed to request TSC IRQ: %d\n", ret);
|
|
chip->tsc_irq = 0;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void init_regulator(struct max8925_chip *chip,
|
|
struct max8925_platform_data *pdata)
|
|
{
|
|
int ret;
|
|
|
|
if (!pdata)
|
|
return;
|
|
if (pdata->sd1) {
|
|
reg_devs[0].platform_data = pdata->sd1;
|
|
reg_devs[0].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->sd2) {
|
|
reg_devs[1].platform_data = pdata->sd2;
|
|
reg_devs[1].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->sd3) {
|
|
reg_devs[2].platform_data = pdata->sd3;
|
|
reg_devs[2].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo1) {
|
|
reg_devs[3].platform_data = pdata->ldo1;
|
|
reg_devs[3].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo2) {
|
|
reg_devs[4].platform_data = pdata->ldo2;
|
|
reg_devs[4].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo3) {
|
|
reg_devs[5].platform_data = pdata->ldo3;
|
|
reg_devs[5].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo4) {
|
|
reg_devs[6].platform_data = pdata->ldo4;
|
|
reg_devs[6].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo5) {
|
|
reg_devs[7].platform_data = pdata->ldo5;
|
|
reg_devs[7].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo6) {
|
|
reg_devs[8].platform_data = pdata->ldo6;
|
|
reg_devs[8].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo7) {
|
|
reg_devs[9].platform_data = pdata->ldo7;
|
|
reg_devs[9].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo8) {
|
|
reg_devs[10].platform_data = pdata->ldo8;
|
|
reg_devs[10].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo9) {
|
|
reg_devs[11].platform_data = pdata->ldo9;
|
|
reg_devs[11].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo10) {
|
|
reg_devs[12].platform_data = pdata->ldo10;
|
|
reg_devs[12].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo11) {
|
|
reg_devs[13].platform_data = pdata->ldo11;
|
|
reg_devs[13].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo12) {
|
|
reg_devs[14].platform_data = pdata->ldo12;
|
|
reg_devs[14].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo13) {
|
|
reg_devs[15].platform_data = pdata->ldo13;
|
|
reg_devs[15].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo14) {
|
|
reg_devs[16].platform_data = pdata->ldo14;
|
|
reg_devs[16].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo15) {
|
|
reg_devs[17].platform_data = pdata->ldo15;
|
|
reg_devs[17].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo16) {
|
|
reg_devs[18].platform_data = pdata->ldo16;
|
|
reg_devs[18].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo17) {
|
|
reg_devs[19].platform_data = pdata->ldo17;
|
|
reg_devs[19].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo18) {
|
|
reg_devs[20].platform_data = pdata->ldo18;
|
|
reg_devs[20].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo19) {
|
|
reg_devs[21].platform_data = pdata->ldo19;
|
|
reg_devs[21].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
if (pdata->ldo20) {
|
|
reg_devs[22].platform_data = pdata->ldo20;
|
|
reg_devs[22].pdata_size = sizeof(struct regulator_init_data);
|
|
}
|
|
ret = mfd_add_devices(chip->dev, 0, reg_devs, ARRAY_SIZE(reg_devs),
|
|
NULL, 0, NULL);
|
|
if (ret < 0) {
|
|
dev_err(chip->dev, "Failed to add regulator subdev\n");
|
|
return;
|
|
}
|
|
}
|
|
|
|
int max8925_device_init(struct max8925_chip *chip,
|
|
struct max8925_platform_data *pdata)
|
|
{
|
|
int ret;
|
|
|
|
max8925_irq_init(chip, chip->i2c->irq, pdata);
|
|
|
|
if (pdata && (pdata->power || pdata->touch)) {
|
|
/* enable ADC to control internal reference */
|
|
max8925_set_bits(chip->i2c, MAX8925_RESET_CNFG, 1, 1);
|
|
/* enable internal reference for ADC */
|
|
max8925_set_bits(chip->adc, MAX8925_TSC_CNFG1, 3, 2);
|
|
/* check for internal reference IRQ */
|
|
do {
|
|
ret = max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
|
|
} while (ret & MAX8925_NREF_OK);
|
|
/* enaable ADC scheduler, interval is 1 second */
|
|
max8925_set_bits(chip->adc, MAX8925_ADC_SCHED, 3, 2);
|
|
}
|
|
|
|
/* enable Momentary Power Loss */
|
|
max8925_set_bits(chip->rtc, MAX8925_MPL_CNTL, 1 << 4, 1 << 4);
|
|
|
|
ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
|
|
ARRAY_SIZE(rtc_devs),
|
|
NULL, chip->irq_base, NULL);
|
|
if (ret < 0) {
|
|
dev_err(chip->dev, "Failed to add rtc subdev\n");
|
|
goto out;
|
|
}
|
|
|
|
ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
|
|
ARRAY_SIZE(onkey_devs),
|
|
NULL, chip->irq_base, NULL);
|
|
if (ret < 0) {
|
|
dev_err(chip->dev, "Failed to add onkey subdev\n");
|
|
goto out_dev;
|
|
}
|
|
|
|
init_regulator(chip, pdata);
|
|
|
|
if (pdata && pdata->backlight) {
|
|
bk_devs[0].platform_data = &pdata->backlight;
|
|
bk_devs[0].pdata_size = sizeof(struct max8925_backlight_pdata);
|
|
}
|
|
ret = mfd_add_devices(chip->dev, 0, bk_devs, ARRAY_SIZE(bk_devs),
|
|
NULL, 0, NULL);
|
|
if (ret < 0) {
|
|
dev_err(chip->dev, "Failed to add backlight subdev\n");
|
|
goto out_dev;
|
|
}
|
|
|
|
ret = mfd_add_devices(chip->dev, 0, &power_devs[0],
|
|
ARRAY_SIZE(power_devs),
|
|
NULL, 0, NULL);
|
|
if (ret < 0) {
|
|
dev_err(chip->dev,
|
|
"Failed to add power supply subdev, err = %d\n", ret);
|
|
goto out_dev;
|
|
}
|
|
|
|
if (pdata && pdata->touch) {
|
|
ret = mfd_add_devices(chip->dev, 0, &touch_devs[0],
|
|
ARRAY_SIZE(touch_devs),
|
|
NULL, chip->tsc_irq, NULL);
|
|
if (ret < 0) {
|
|
dev_err(chip->dev, "Failed to add touch subdev\n");
|
|
goto out_dev;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
out_dev:
|
|
mfd_remove_devices(chip->dev);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
void max8925_device_exit(struct max8925_chip *chip)
|
|
{
|
|
if (chip->core_irq)
|
|
free_irq(chip->core_irq, chip);
|
|
if (chip->tsc_irq)
|
|
free_irq(chip->tsc_irq, chip);
|
|
mfd_remove_devices(chip->dev);
|
|
}
|