mirror of https://gitee.com/openkylin/linux.git
141 lines
3.5 KiB
C
141 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Xilinx, Inc.
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*
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*/
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/firmware/xlnx-zynqmp.h>
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#include <linux/of_device.h>
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#define ZYNQMP_NR_RESETS (ZYNQMP_PM_RESET_END - ZYNQMP_PM_RESET_START)
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#define ZYNQMP_RESET_ID ZYNQMP_PM_RESET_START
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#define VERSAL_NR_RESETS 95
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struct zynqmp_reset_soc_data {
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u32 reset_id;
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u32 num_resets;
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};
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struct zynqmp_reset_data {
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struct reset_controller_dev rcdev;
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const struct zynqmp_reset_soc_data *data;
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};
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static inline struct zynqmp_reset_data *
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to_zynqmp_reset_data(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct zynqmp_reset_data, rcdev);
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}
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static int zynqmp_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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return zynqmp_pm_reset_assert(priv->data->reset_id + id,
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PM_RESET_ACTION_ASSERT);
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}
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static int zynqmp_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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return zynqmp_pm_reset_assert(priv->data->reset_id + id,
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PM_RESET_ACTION_RELEASE);
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}
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static int zynqmp_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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int val, err;
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err = zynqmp_pm_reset_get_status(priv->data->reset_id + id, &val);
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if (err)
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return err;
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return val;
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}
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static int zynqmp_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);
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return zynqmp_pm_reset_assert(priv->data->reset_id + id,
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PM_RESET_ACTION_PULSE);
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}
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static int zynqmp_reset_of_xlate(struct reset_controller_dev *rcdev,
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const struct of_phandle_args *reset_spec)
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{
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return reset_spec->args[0];
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}
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static const struct zynqmp_reset_soc_data zynqmp_reset_data = {
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.reset_id = ZYNQMP_RESET_ID,
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.num_resets = ZYNQMP_NR_RESETS,
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};
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static const struct zynqmp_reset_soc_data versal_reset_data = {
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.reset_id = 0,
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.num_resets = VERSAL_NR_RESETS,
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};
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static const struct reset_control_ops zynqmp_reset_ops = {
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.reset = zynqmp_reset_reset,
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.assert = zynqmp_reset_assert,
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.deassert = zynqmp_reset_deassert,
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.status = zynqmp_reset_status,
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};
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static int zynqmp_reset_probe(struct platform_device *pdev)
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{
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struct zynqmp_reset_data *priv;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->data = of_device_get_match_data(&pdev->dev);
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if (!priv->data)
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return -EINVAL;
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platform_set_drvdata(pdev, priv);
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priv->rcdev.ops = &zynqmp_reset_ops;
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priv->rcdev.owner = THIS_MODULE;
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priv->rcdev.of_node = pdev->dev.of_node;
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priv->rcdev.nr_resets = priv->data->num_resets;
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priv->rcdev.of_reset_n_cells = 1;
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priv->rcdev.of_xlate = zynqmp_reset_of_xlate;
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return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
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}
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static const struct of_device_id zynqmp_reset_dt_ids[] = {
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{ .compatible = "xlnx,zynqmp-reset", .data = &zynqmp_reset_data, },
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{ .compatible = "xlnx,versal-reset", .data = &versal_reset_data, },
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{ /* sentinel */ },
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};
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static struct platform_driver zynqmp_reset_driver = {
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.probe = zynqmp_reset_probe,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = zynqmp_reset_dt_ids,
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},
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};
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static int __init zynqmp_reset_init(void)
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{
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return platform_driver_register(&zynqmp_reset_driver);
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}
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arch_initcall(zynqmp_reset_init);
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