mirror of https://gitee.com/openkylin/linux.git
528 lines
12 KiB
C
528 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2006 Jake Moilanen <moilanen@austin.ibm.com>, IBM Corp.
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* Copyright 2006-2007 Michael Ellerman, IBM Corp.
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*/
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#include <linux/device.h>
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#include <linux/irq.h>
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#include <linux/msi.h>
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#include <asm/rtas.h>
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#include <asm/hw_irq.h>
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#include <asm/ppc-pci.h>
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#include <asm/machdep.h>
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#include "pseries.h"
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static int query_token, change_token;
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#define RTAS_QUERY_FN 0
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#define RTAS_CHANGE_FN 1
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#define RTAS_RESET_FN 2
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#define RTAS_CHANGE_MSI_FN 3
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#define RTAS_CHANGE_MSIX_FN 4
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#define RTAS_CHANGE_32MSI_FN 5
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/* RTAS Helpers */
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static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
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{
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u32 addr, seq_num, rtas_ret[3];
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unsigned long buid;
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int rc;
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addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
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buid = pdn->phb->buid;
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seq_num = 1;
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do {
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if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN ||
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func == RTAS_CHANGE_32MSI_FN)
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rc = rtas_call(change_token, 6, 4, rtas_ret, addr,
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BUID_HI(buid), BUID_LO(buid),
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func, num_irqs, seq_num);
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else
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rc = rtas_call(change_token, 6, 3, rtas_ret, addr,
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BUID_HI(buid), BUID_LO(buid),
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func, num_irqs, seq_num);
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seq_num = rtas_ret[1];
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} while (rtas_busy_delay(rc));
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/*
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* If the RTAS call succeeded, return the number of irqs allocated.
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* If not, make sure we return a negative error code.
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*/
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if (rc == 0)
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rc = rtas_ret[0];
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else if (rc > 0)
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rc = -rc;
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pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n",
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func, num_irqs, rtas_ret[0], rc);
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return rc;
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}
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static void rtas_disable_msi(struct pci_dev *pdev)
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{
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struct pci_dn *pdn;
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pdn = pci_get_pdn(pdev);
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if (!pdn)
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return;
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/*
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* disabling MSI with the explicit interface also disables MSI-X
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*/
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if (rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, 0) != 0) {
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/*
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* may have failed because explicit interface is not
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* present
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*/
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if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0) {
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pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
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}
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}
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}
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static int rtas_query_irq_number(struct pci_dn *pdn, int offset)
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{
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u32 addr, rtas_ret[2];
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unsigned long buid;
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int rc;
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addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
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buid = pdn->phb->buid;
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do {
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rc = rtas_call(query_token, 4, 3, rtas_ret, addr,
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BUID_HI(buid), BUID_LO(buid), offset);
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} while (rtas_busy_delay(rc));
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if (rc) {
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pr_debug("rtas_msi: error (%d) querying source number\n", rc);
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return rc;
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}
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return rtas_ret[0];
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}
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static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
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{
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struct msi_desc *entry;
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for_each_pci_msi_entry(entry, pdev) {
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if (!entry->irq)
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continue;
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irq_set_msi_desc(entry->irq, NULL);
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irq_dispose_mapping(entry->irq);
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}
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rtas_disable_msi(pdev);
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}
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static int check_req(struct pci_dev *pdev, int nvec, char *prop_name)
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{
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struct device_node *dn;
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const __be32 *p;
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u32 req_msi;
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dn = pci_device_to_OF_node(pdev);
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p = of_get_property(dn, prop_name, NULL);
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if (!p) {
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pr_debug("rtas_msi: No %s on %pOF\n", prop_name, dn);
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return -ENOENT;
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}
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req_msi = be32_to_cpup(p);
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if (req_msi < nvec) {
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pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec);
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if (req_msi == 0) /* Be paranoid */
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return -ENOSPC;
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return req_msi;
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}
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return 0;
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}
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static int check_req_msi(struct pci_dev *pdev, int nvec)
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{
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return check_req(pdev, nvec, "ibm,req#msi");
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}
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static int check_req_msix(struct pci_dev *pdev, int nvec)
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{
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return check_req(pdev, nvec, "ibm,req#msi-x");
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}
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/* Quota calculation */
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static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total)
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{
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struct device_node *dn;
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const __be32 *p;
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dn = of_node_get(pci_device_to_OF_node(dev));
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while (dn) {
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p = of_get_property(dn, "ibm,pe-total-#msi", NULL);
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if (p) {
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pr_debug("rtas_msi: found prop on dn %pOF\n",
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dn);
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*total = be32_to_cpup(p);
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return dn;
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}
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dn = of_get_next_parent(dn);
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}
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return NULL;
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}
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static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
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{
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struct device_node *dn;
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struct eeh_dev *edev;
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/* Found our PE and assume 8 at that point. */
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dn = pci_device_to_OF_node(dev);
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if (!dn)
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return NULL;
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/* Get the top level device in the PE */
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edev = pdn_to_eeh_dev(PCI_DN(dn));
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if (edev->pe)
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edev = list_first_entry(&edev->pe->edevs, struct eeh_dev,
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entry);
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dn = pci_device_to_OF_node(edev->pdev);
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if (!dn)
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return NULL;
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/* We actually want the parent */
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dn = of_get_parent(dn);
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if (!dn)
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return NULL;
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/* Hardcode of 8 for old firmwares */
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*total = 8;
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pr_debug("rtas_msi: using PE dn %pOF\n", dn);
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return dn;
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}
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struct msi_counts {
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struct device_node *requestor;
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int num_devices;
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int request;
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int quota;
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int spare;
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int over_quota;
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};
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static void *count_non_bridge_devices(struct device_node *dn, void *data)
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{
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struct msi_counts *counts = data;
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const __be32 *p;
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u32 class;
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pr_debug("rtas_msi: counting %pOF\n", dn);
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p = of_get_property(dn, "class-code", NULL);
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class = p ? be32_to_cpup(p) : 0;
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if ((class >> 8) != PCI_CLASS_BRIDGE_PCI)
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counts->num_devices++;
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return NULL;
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}
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static void *count_spare_msis(struct device_node *dn, void *data)
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{
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struct msi_counts *counts = data;
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const __be32 *p;
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int req;
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if (dn == counts->requestor)
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req = counts->request;
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else {
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/* We don't know if a driver will try to use MSI or MSI-X,
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* so we just have to punt and use the larger of the two. */
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req = 0;
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p = of_get_property(dn, "ibm,req#msi", NULL);
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if (p)
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req = be32_to_cpup(p);
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p = of_get_property(dn, "ibm,req#msi-x", NULL);
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if (p)
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req = max(req, (int)be32_to_cpup(p));
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}
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if (req < counts->quota)
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counts->spare += counts->quota - req;
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else if (req > counts->quota)
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counts->over_quota++;
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return NULL;
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}
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static int msi_quota_for_device(struct pci_dev *dev, int request)
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{
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struct device_node *pe_dn;
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struct msi_counts counts;
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int total;
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pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev),
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request);
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pe_dn = find_pe_total_msi(dev, &total);
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if (!pe_dn)
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pe_dn = find_pe_dn(dev, &total);
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if (!pe_dn) {
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pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev));
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goto out;
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}
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pr_debug("rtas_msi: found PE %pOF\n", pe_dn);
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memset(&counts, 0, sizeof(struct msi_counts));
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/* Work out how many devices we have below this PE */
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pci_traverse_device_nodes(pe_dn, count_non_bridge_devices, &counts);
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if (counts.num_devices == 0) {
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pr_err("rtas_msi: found 0 devices under PE for %s\n",
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pci_name(dev));
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goto out;
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}
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counts.quota = total / counts.num_devices;
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if (request <= counts.quota)
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goto out;
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/* else, we have some more calculating to do */
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counts.requestor = pci_device_to_OF_node(dev);
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counts.request = request;
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pci_traverse_device_nodes(pe_dn, count_spare_msis, &counts);
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/* If the quota isn't an integer multiple of the total, we can
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* use the remainder as spare MSIs for anyone that wants them. */
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counts.spare += total % counts.num_devices;
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/* Divide any spare by the number of over-quota requestors */
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if (counts.over_quota)
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counts.quota += counts.spare / counts.over_quota;
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/* And finally clamp the request to the possibly adjusted quota */
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request = min(counts.quota, request);
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pr_debug("rtas_msi: request clamped to quota %d\n", request);
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out:
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of_node_put(pe_dn);
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return request;
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}
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static int check_msix_entries(struct pci_dev *pdev)
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{
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struct msi_desc *entry;
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int expected;
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/* There's no way for us to express to firmware that we want
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* a discontiguous, or non-zero based, range of MSI-X entries.
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* So we must reject such requests. */
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expected = 0;
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for_each_pci_msi_entry(entry, pdev) {
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if (entry->msi_attrib.entry_nr != expected) {
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pr_debug("rtas_msi: bad MSI-X entries.\n");
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return -EINVAL;
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}
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expected++;
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}
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return 0;
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}
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static void rtas_hack_32bit_msi_gen2(struct pci_dev *pdev)
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{
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u32 addr_hi, addr_lo;
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/*
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* We should only get in here for IODA1 configs. This is based on the
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* fact that we using RTAS for MSIs, we don't have the 32 bit MSI RTAS
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* support, and we are in a PCIe Gen2 slot.
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*/
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dev_info(&pdev->dev,
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"rtas_msi: No 32 bit MSI firmware support, forcing 32 bit MSI\n");
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pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
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addr_lo = 0xffff0000 | ((addr_hi >> (48 - 32)) << 4);
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pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
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pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, 0);
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}
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static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec_in, int type)
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{
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struct pci_dn *pdn;
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int hwirq, virq, i, quota, rc;
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struct msi_desc *entry;
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struct msi_msg msg;
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int nvec = nvec_in;
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int use_32bit_msi_hack = 0;
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if (type == PCI_CAP_ID_MSIX)
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rc = check_req_msix(pdev, nvec);
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else
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rc = check_req_msi(pdev, nvec);
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if (rc)
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return rc;
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quota = msi_quota_for_device(pdev, nvec);
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if (quota && quota < nvec)
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return quota;
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if (type == PCI_CAP_ID_MSIX && check_msix_entries(pdev))
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return -EINVAL;
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/*
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* Firmware currently refuse any non power of two allocation
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* so we round up if the quota will allow it.
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*/
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if (type == PCI_CAP_ID_MSIX) {
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int m = roundup_pow_of_two(nvec);
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quota = msi_quota_for_device(pdev, m);
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if (quota >= m)
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nvec = m;
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}
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pdn = pci_get_pdn(pdev);
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/*
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* Try the new more explicit firmware interface, if that fails fall
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* back to the old interface. The old interface is known to never
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* return MSI-Xs.
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*/
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again:
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if (type == PCI_CAP_ID_MSI) {
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if (pdev->no_64bit_msi) {
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rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec);
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if (rc < 0) {
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/*
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* We only want to run the 32 bit MSI hack below if
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* the max bus speed is Gen2 speed
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*/
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if (pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT)
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return rc;
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use_32bit_msi_hack = 1;
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}
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} else
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rc = -1;
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if (rc < 0)
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rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
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if (rc < 0) {
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pr_debug("rtas_msi: trying the old firmware call.\n");
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rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
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}
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if (use_32bit_msi_hack && rc > 0)
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rtas_hack_32bit_msi_gen2(pdev);
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} else
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rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
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if (rc != nvec) {
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if (nvec != nvec_in) {
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nvec = nvec_in;
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goto again;
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}
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pr_debug("rtas_msi: rtas_change_msi() failed\n");
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return rc;
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}
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i = 0;
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for_each_pci_msi_entry(entry, pdev) {
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hwirq = rtas_query_irq_number(pdn, i++);
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if (hwirq < 0) {
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pr_debug("rtas_msi: error (%d) getting hwirq\n", rc);
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return hwirq;
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}
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virq = irq_create_mapping(NULL, hwirq);
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if (!virq) {
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pr_debug("rtas_msi: Failed mapping hwirq %d\n", hwirq);
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return -ENOSPC;
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}
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dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq);
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irq_set_msi_desc(virq, entry);
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/* Read config space back so we can restore after reset */
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__pci_read_msi_msg(entry, &msg);
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entry->msg = msg;
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}
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return 0;
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}
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static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
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{
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/* No LSI -> leave MSIs (if any) configured */
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if (!pdev->irq) {
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dev_dbg(&pdev->dev, "rtas_msi: no LSI, nothing to do.\n");
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return;
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}
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/* No MSI -> MSIs can't have been assigned by fw, leave LSI */
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if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) {
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dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n");
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return;
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}
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dev_dbg(&pdev->dev, "rtas_msi: disabling existing MSI.\n");
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rtas_disable_msi(pdev);
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}
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static int rtas_msi_init(void)
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{
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struct pci_controller *phb;
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query_token = rtas_token("ibm,query-interrupt-source-number");
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change_token = rtas_token("ibm,change-msi");
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if ((query_token == RTAS_UNKNOWN_SERVICE) ||
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(change_token == RTAS_UNKNOWN_SERVICE)) {
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pr_debug("rtas_msi: no RTAS tokens, no MSI support.\n");
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return -1;
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}
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pr_debug("rtas_msi: Registering RTAS MSI callbacks.\n");
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WARN_ON(pseries_pci_controller_ops.setup_msi_irqs);
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pseries_pci_controller_ops.setup_msi_irqs = rtas_setup_msi_irqs;
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pseries_pci_controller_ops.teardown_msi_irqs = rtas_teardown_msi_irqs;
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|
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list_for_each_entry(phb, &hose_list, list_node) {
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WARN_ON(phb->controller_ops.setup_msi_irqs);
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phb->controller_ops.setup_msi_irqs = rtas_setup_msi_irqs;
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phb->controller_ops.teardown_msi_irqs = rtas_teardown_msi_irqs;
|
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}
|
|
|
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WARN_ON(ppc_md.pci_irq_fixup);
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ppc_md.pci_irq_fixup = rtas_msi_pci_irq_fixup;
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|
|
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return 0;
|
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}
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machine_arch_initcall(pseries, rtas_msi_init);
|