mirror of https://gitee.com/openkylin/linux.git
151 lines
3.0 KiB
C
151 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* cxd2880_tnrdmd_mon.c
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* Sony CXD2880 DVB-T2/T tuner + demodulator driver
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* common monitor functions
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*
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* Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation
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*/
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#include "cxd2880_common.h"
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#include "cxd2880_tnrdmd_mon.h"
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static const u8 rf_lvl_seq[2] = {
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0x80, 0x00,
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};
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int cxd2880_tnrdmd_mon_rf_lvl(struct cxd2880_tnrdmd *tnr_dmd,
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int *rf_lvl_db)
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{
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u8 rdata[2];
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int ret;
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if (!tnr_dmd || !rf_lvl_db)
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return -EINVAL;
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if (tnr_dmd->state != CXD2880_TNRDMD_STATE_ACTIVE)
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return -EINVAL;
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_DMD,
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0x00, 0x00);
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if (ret)
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return ret;
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_DMD,
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0x10, 0x01);
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if (ret)
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return ret;
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x00, 0x10);
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if (ret)
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return ret;
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ret = tnr_dmd->io->write_regs(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x5b, rf_lvl_seq, 2);
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if (ret)
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return ret;
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usleep_range(2000, 3000);
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x00, 0x1a);
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if (ret)
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return ret;
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ret = tnr_dmd->io->read_regs(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x15, rdata, 2);
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if (ret)
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return ret;
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if (rdata[0] || rdata[1])
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return -EINVAL;
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ret = tnr_dmd->io->read_regs(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x11, rdata, 2);
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if (ret)
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return ret;
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*rf_lvl_db =
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cxd2880_convert2s_complement((rdata[0] << 3) |
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((rdata[1] & 0xe0) >> 5), 11);
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*rf_lvl_db *= 125;
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_DMD,
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0x00, 0x00);
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if (ret)
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return ret;
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_DMD,
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0x10, 0x00);
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if (ret)
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return ret;
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if (tnr_dmd->rf_lvl_cmpstn)
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ret = tnr_dmd->rf_lvl_cmpstn(tnr_dmd, rf_lvl_db);
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return ret;
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}
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int cxd2880_tnrdmd_mon_rf_lvl_sub(struct cxd2880_tnrdmd *tnr_dmd,
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int *rf_lvl_db)
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{
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if (!tnr_dmd || !rf_lvl_db)
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return -EINVAL;
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if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN)
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return -EINVAL;
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return cxd2880_tnrdmd_mon_rf_lvl(tnr_dmd->diver_sub, rf_lvl_db);
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}
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int cxd2880_tnrdmd_mon_internal_cpu_status(struct cxd2880_tnrdmd
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*tnr_dmd, u16 *status)
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{
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u8 data[2] = { 0 };
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int ret;
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if (!tnr_dmd || !status)
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return -EINVAL;
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ret = tnr_dmd->io->write_reg(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x00, 0x1a);
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if (ret)
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return ret;
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ret = tnr_dmd->io->read_regs(tnr_dmd->io,
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CXD2880_IO_TGT_SYS,
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0x15, data, 2);
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if (ret)
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return ret;
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*status = (data[0] << 8) | data[1];
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return 0;
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}
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int cxd2880_tnrdmd_mon_internal_cpu_status_sub(struct
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cxd2880_tnrdmd
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*tnr_dmd,
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u16 *status)
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{
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if (!tnr_dmd || !status)
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return -EINVAL;
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if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN)
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return -EINVAL;
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return cxd2880_tnrdmd_mon_internal_cpu_status(tnr_dmd->diver_sub,
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status);
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}
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