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79 lines
2.0 KiB
Plaintext
79 lines
2.0 KiB
Plaintext
* Broadcom Starfighter 2 integrated swich
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Required properties:
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- compatible: should be "brcm,bcm7445-switch-v4.0"
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- reg: addresses and length of the register sets for the device, must be 6
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pairs of register addresses and lengths
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- interrupts: interrupts for the devices, must be two interrupts
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- dsa,mii-bus: phandle to the MDIO bus controller, see dsa/dsa.txt
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- dsa,ethernet: phandle to the CPU network interface controller, see dsa/dsa.txt
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- #size-cells: must be 0
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- #address-cells: must be 2, see dsa/dsa.txt
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Subnodes:
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The integrated switch subnode should be specified according to the binding
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described in dsa/dsa.txt.
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Optional properties:
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- reg-names: litteral names for the device base register addresses, when present
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must be: "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb"
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- interrupt-names: litternal names for the device interrupt lines, when present
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must be: "switch_0" and "switch_1"
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- brcm,num-gphy: specify the maximum number of integrated gigabit PHYs in the
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switch
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- brcm,num-rgmii-ports: specify the maximum number of RGMII interfaces supported
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by the switch
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- brcm,fcb-pause-override: boolean property, if present indicates that the switch
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supports Failover Control Block pause override capability
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- brcm,acb-packets-inflight: boolean property, if present indicates that the switch
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Admission Control Block supports reporting the number of packets in-flight in a
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switch queue
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Example:
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switch_top@f0b00000 {
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compatible = "simple-bus";
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#size-cells = <1>;
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#address-cells = <1>;
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ranges = <0 0xf0b00000 0x40804>;
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ethernet_switch@0 {
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compatible = "brcm,bcm7445-switch-v4.0";
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#size-cells = <0>;
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#address-cells = <2>;
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reg = <0x0 0x40000
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0x40000 0x110
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0x40340 0x30
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0x40380 0x30
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0x40400 0x34
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0x40600 0x208>;
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interrupts = <0 0x18 0
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0 0x19 0>;
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brcm,num-gphy = <1>;
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brcm,num-rgmii-ports = <2>;
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brcm,fcb-pause-override;
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brcm,acb-packets-inflight;
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...
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switch@0 {
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reg = <0 0>;
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#size-cells = <0>;
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#address-cells <1>;
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port@0 {
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label = "gphy";
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reg = <0>;
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};
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...
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};
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};
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};
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