mirror of https://gitee.com/openkylin/linux.git
0c20494050
The driver does not always use the same timing for what looks like the same operations. - DCR0 Use the same udelay everywhere for reset. Upper bound is 100 us. - DCR9 Use 5us delay for srom clock. 1us delay for phy_write_1bit (writes PHY_DATA_[01]) are not changed as they stay withing a 2,5MHz MDIO clock range. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| 21142.c | ||
| Kconfig | ||
| Makefile | ||
| de4x5.c | ||
| de4x5.h | ||
| de2104x.c | ||
| dmfe.c | ||
| eeprom.c | ||
| interrupt.c | ||
| media.c | ||
| pnic.c | ||
| pnic2.c | ||
| timer.c | ||
| tulip.h | ||
| tulip_core.c | ||
| uli526x.c | ||
| winbond-840.c | ||
| xircom_cb.c | ||