mirror of https://gitee.com/openkylin/linux.git
351 lines
8.2 KiB
C
351 lines
8.2 KiB
C
/*
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* linux/arch/arm/mach-mmp/devices.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/delay.h>
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#include <asm/irq.h>
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#include "irqs.h"
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#include "devices.h"
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#include "cputype.h"
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#include "regs-usb.h"
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int __init pxa_register_device(struct pxa_device_desc *desc,
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void *data, size_t size)
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{
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struct platform_device *pdev;
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struct resource res[2 + MAX_RESOURCE_DMA];
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int i, ret = 0, nres = 0;
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pdev = platform_device_alloc(desc->drv_name, desc->id);
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if (pdev == NULL)
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return -ENOMEM;
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pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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memset(res, 0, sizeof(res));
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if (desc->start != -1ul && desc->size > 0) {
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res[nres].start = desc->start;
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res[nres].end = desc->start + desc->size - 1;
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res[nres].flags = IORESOURCE_MEM;
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nres++;
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}
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if (desc->irq != NO_IRQ) {
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res[nres].start = desc->irq;
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res[nres].end = desc->irq;
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res[nres].flags = IORESOURCE_IRQ;
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nres++;
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}
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for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) {
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if (desc->dma[i] == 0)
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break;
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res[nres].start = desc->dma[i];
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res[nres].end = desc->dma[i];
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res[nres].flags = IORESOURCE_DMA;
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}
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ret = platform_device_add_resources(pdev, res, nres);
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if (ret) {
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platform_device_put(pdev);
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return ret;
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}
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if (data && size) {
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ret = platform_device_add_data(pdev, data, size);
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if (ret) {
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platform_device_put(pdev);
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return ret;
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}
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}
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return platform_device_add(pdev);
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}
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#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
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#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
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#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
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/*****************************************************************************
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* The registers read/write routines
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*****************************************************************************/
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static unsigned int u2o_get(void __iomem *base, unsigned int offset)
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{
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return readl_relaxed(base + offset);
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}
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static void u2o_set(void __iomem *base, unsigned int offset,
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unsigned int value)
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{
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u32 reg;
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reg = readl_relaxed(base + offset);
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reg |= value;
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writel_relaxed(reg, base + offset);
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readl_relaxed(base + offset);
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}
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static void u2o_clear(void __iomem *base, unsigned int offset,
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unsigned int value)
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{
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u32 reg;
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reg = readl_relaxed(base + offset);
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reg &= ~value;
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writel_relaxed(reg, base + offset);
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readl_relaxed(base + offset);
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}
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static void u2o_write(void __iomem *base, unsigned int offset,
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unsigned int value)
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{
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writel_relaxed(value, base + offset);
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readl_relaxed(base + offset);
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}
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static DEFINE_MUTEX(phy_lock);
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static int phy_init_cnt;
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static int usb_phy_init_internal(void __iomem *base)
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{
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int loops;
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pr_info("Init usb phy!!!\n");
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/* Initialize the USB PHY power */
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if (cpu_is_pxa910()) {
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u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
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| (1<<UTMI_CTRL_PU_REF_SHIFT));
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}
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u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
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u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
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/* UTMI_PLL settings */
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u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
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| UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK
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| UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK
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| UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);
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u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
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| 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT
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| 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT
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| 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT);
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/* UTMI_TX */
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u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
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| UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK
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| UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK
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| UTMI_TX_AMP_MASK);
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u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
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| 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT
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| 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT);
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/* UTMI_RX */
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u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
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| UTMI_REG_SQ_LENGTH_MASK);
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u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
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| 2<<UTMI_REG_SQ_LENGTH_SHIFT);
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/* UTMI_IVREF */
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if (cpu_is_pxa168())
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/* fixing Microsoft Altair board interface with NEC hub issue -
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* Set UTMI_IVREF from 0x4a3 to 0x4bf */
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u2o_write(base, UTMI_IVREF, 0x4bf);
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/* toggle VCOCAL_START bit of UTMI_PLL */
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udelay(200);
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u2o_set(base, UTMI_PLL, VCOCAL_START);
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udelay(40);
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u2o_clear(base, UTMI_PLL, VCOCAL_START);
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/* toggle REG_RCAL_START bit of UTMI_TX */
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udelay(400);
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u2o_set(base, UTMI_TX, REG_RCAL_START);
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udelay(40);
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u2o_clear(base, UTMI_TX, REG_RCAL_START);
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udelay(400);
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/* Make sure PHY PLL is ready */
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loops = 0;
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while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
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mdelay(1);
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loops++;
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if (loops > 100) {
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printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
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u2o_get(base, UTMI_PLL));
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break;
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}
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}
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if (cpu_is_pxa168()) {
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u2o_set(base, UTMI_RESERVE, 1 << 5);
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/* Turn on UTMI PHY OTG extension */
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u2o_write(base, UTMI_OTG_ADDON, 1);
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}
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return 0;
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}
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static int usb_phy_deinit_internal(void __iomem *base)
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{
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pr_info("Deinit usb phy!!!\n");
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if (cpu_is_pxa168())
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u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);
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u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
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u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
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u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
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u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
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u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
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return 0;
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}
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int pxa_usb_phy_init(void __iomem *phy_reg)
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{
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mutex_lock(&phy_lock);
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if (phy_init_cnt++ == 0)
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usb_phy_init_internal(phy_reg);
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mutex_unlock(&phy_lock);
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return 0;
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}
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void pxa_usb_phy_deinit(void __iomem *phy_reg)
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{
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WARN_ON(phy_init_cnt == 0);
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mutex_lock(&phy_lock);
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if (--phy_init_cnt == 0)
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usb_phy_deinit_internal(phy_reg);
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mutex_unlock(&phy_lock);
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}
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#endif
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#endif
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#endif
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#if IS_ENABLED(CONFIG_USB_SUPPORT)
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static u64 usb_dma_mask = ~(u32)0;
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#if IS_ENABLED(CONFIG_USB_MV_UDC)
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struct resource pxa168_u2o_resources[] = {
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/* regbase */
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[0] = {
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.start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
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.end = PXA168_U2O_REGBASE + USB_REG_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "capregs",
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},
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/* phybase */
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[1] = {
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.start = PXA168_U2O_PHYBASE,
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.end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "phyregs",
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},
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[2] = {
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.start = IRQ_PXA168_USB1,
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.end = IRQ_PXA168_USB1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa168_device_u2o = {
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.name = "mv-udc",
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.id = -1,
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.resource = pxa168_u2o_resources,
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.num_resources = ARRAY_SIZE(pxa168_u2o_resources),
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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}
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};
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#endif /* CONFIG_USB_MV_UDC */
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#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
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struct resource pxa168_u2oehci_resources[] = {
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/* regbase */
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[0] = {
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.start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
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.end = PXA168_U2O_REGBASE + USB_REG_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "capregs",
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},
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/* phybase */
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[1] = {
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.start = PXA168_U2O_PHYBASE,
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.end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "phyregs",
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},
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[2] = {
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.start = IRQ_PXA168_USB1,
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.end = IRQ_PXA168_USB1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa168_device_u2oehci = {
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.name = "pxa-u2oehci",
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.id = -1,
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxa168_u2oehci_resources),
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.resource = pxa168_u2oehci_resources,
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};
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#endif
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#if IS_ENABLED(CONFIG_USB_MV_OTG)
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struct resource pxa168_u2ootg_resources[] = {
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/* regbase */
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[0] = {
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.start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
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.end = PXA168_U2O_REGBASE + USB_REG_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "capregs",
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},
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/* phybase */
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[1] = {
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.start = PXA168_U2O_PHYBASE,
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.end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
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.flags = IORESOURCE_MEM,
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.name = "phyregs",
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},
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[2] = {
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.start = IRQ_PXA168_USB1,
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.end = IRQ_PXA168_USB1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa168_device_u2ootg = {
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.name = "mv-otg",
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.id = -1,
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxa168_u2ootg_resources),
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.resource = pxa168_u2ootg_resources,
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};
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#endif /* CONFIG_USB_MV_OTG */
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#endif
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