mirror of https://gitee.com/openkylin/linux.git
388 lines
11 KiB
C
388 lines
11 KiB
C
/*
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* Copyright (c) 2009-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/export.h>
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#include "hw.h"
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enum ath_bt_mode {
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ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
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ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
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ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
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ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
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};
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struct ath_btcoex_config {
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u8 bt_time_extend;
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bool bt_txstate_extend;
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bool bt_txframe_extend;
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enum ath_bt_mode bt_mode; /* coexistence mode */
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bool bt_quiet_collision;
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bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
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u8 bt_priority_time;
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u8 bt_first_slot_time;
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bool bt_hold_rx_clear;
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};
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static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
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[AR9300_NUM_WLAN_WEIGHTS] = {
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{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
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{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
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{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
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};
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static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
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[AR9300_NUM_WLAN_WEIGHTS] = {
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{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
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{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
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{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
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{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
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};
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void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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const struct ath_btcoex_config ath_bt_config = {
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.bt_time_extend = 0,
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.bt_txstate_extend = true,
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.bt_txframe_extend = true,
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.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
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.bt_quiet_collision = true,
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.bt_rxclear_polarity = true,
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.bt_priority_time = 2,
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.bt_first_slot_time = 5,
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.bt_hold_rx_clear = true,
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};
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u32 i, idx;
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bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
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if (AR_SREV_9300_20_OR_LATER(ah))
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rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
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btcoex_hw->bt_coex_mode =
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(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
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SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
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SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
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SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
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SM(ath_bt_config.bt_mode, AR_BT_MODE) |
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SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
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SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
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SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
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SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
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SM(qnum, AR_BT_QCU_THRESH);
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btcoex_hw->bt_coex_mode2 =
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SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
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SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
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AR_BT_DISABLE_BT_ANT;
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for (i = 0; i < 32; i++) {
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idx = (debruijn32 << i) >> 27;
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ah->hw_gen_timers.gen_timer_index[idx] = i;
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}
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}
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EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
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void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/*
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* Check if BTCOEX is globally disabled.
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*/
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if (!common->btcoex_enabled) {
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btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
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return;
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}
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
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btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
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btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
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btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
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} else if (AR_SREV_9280_20_OR_LATER(ah)) {
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btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
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btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
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if (AR_SREV_9285(ah)) {
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btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
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btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
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} else {
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btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
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}
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}
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
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void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/* connect bt_active to baseband */
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REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
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AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
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REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
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/* Set input mux for bt_active to gpio pin */
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REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
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AR_GPIO_INPUT_MUX1_BT_ACTIVE,
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btcoex_hw->btactive_gpio);
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/* Configure the desired gpio port for input */
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ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
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void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/* btcoex 3-wire */
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REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
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AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
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/* Set input mux for bt_prority_async and
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* bt_active_async to GPIO pins */
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REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
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AR_GPIO_INPUT_MUX1_BT_ACTIVE,
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btcoex_hw->btactive_gpio);
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REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
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AR_GPIO_INPUT_MUX1_BT_PRIORITY,
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btcoex_hw->btpriority_gpio);
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/* Configure the desired GPIO ports for input */
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ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
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ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
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void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
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{
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ah->btcoex_hw.mci.ready = false;
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ah->btcoex_hw.mci.bt_state = 0;
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ah->btcoex_hw.mci.bt_ver_major = 3;
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ah->btcoex_hw.mci.bt_ver_minor = 0;
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ah->btcoex_hw.mci.bt_version_known = false;
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ah->btcoex_hw.mci.update_2g5g = true;
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ah->btcoex_hw.mci.is_2g = true;
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ah->btcoex_hw.mci.wlan_channels_update = false;
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ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
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ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
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ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
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ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
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ah->btcoex_hw.mci.query_bt = true;
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ah->btcoex_hw.mci.unhalt_bt_gpm = true;
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ah->btcoex_hw.mci.halted_bt_gpm = false;
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ah->btcoex_hw.mci.need_flush_btinfo = false;
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ah->btcoex_hw.mci.wlan_cal_seq = 0;
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ah->btcoex_hw.mci.wlan_cal_done = 0;
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ah->btcoex_hw.mci.config = 0x2201;
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
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static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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/* Configure the desired GPIO port for TX_FRAME output */
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ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
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}
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/*
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* For AR9002, bt_weight/wlan_weight are used.
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* For AR9003 and above, stomp_type is used.
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*/
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void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
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u32 bt_weight,
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u32 wlan_weight,
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enum ath_stomp_type stomp_type)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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const u32 *weight = ar9003_wlan_weights[stomp_type];
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int i;
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if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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if ((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
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btcoex_hw->mci.stomp_ftp)
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stomp_type = ATH_BTCOEX_STOMP_LOW_FTP;
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weight = mci_wlan_weights[stomp_type];
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}
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for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
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btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
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btcoex_hw->wlan_weight[i] = weight[i];
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}
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} else {
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btcoex_hw->bt_coex_weights =
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SM(bt_weight, AR_BTCOEX_BT_WGHT) |
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SM(wlan_weight, AR_BTCOEX_WL_WGHT);
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}
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
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static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
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u32 val;
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int i;
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/*
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* Program coex mode and weight registers to
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* enable coex 3-wire
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*/
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REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
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REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
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REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
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for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
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REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
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btcoex->bt_weight[i]);
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} else
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REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
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if (AR_SREV_9271(ah)) {
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val = REG_READ(ah, 0x50040);
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val &= 0xFFFFFEFF;
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REG_WRITE(ah, 0x50040, val);
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}
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REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
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REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
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ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
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}
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static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
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int i;
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for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
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REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
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btcoex->wlan_weight[i]);
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REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
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btcoex->enabled = true;
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}
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void ath9k_hw_btcoex_enable(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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switch (ath9k_hw_get_btcoex_scheme(ah)) {
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case ATH_BTCOEX_CFG_NONE:
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return;
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case ATH_BTCOEX_CFG_2WIRE:
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ath9k_hw_btcoex_enable_2wire(ah);
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break;
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case ATH_BTCOEX_CFG_3WIRE:
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if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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ath9k_hw_btcoex_enable_mci(ah);
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return;
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}
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ath9k_hw_btcoex_enable_3wire(ah);
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break;
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}
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REG_RMW(ah, AR_GPIO_PDPU,
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(0x2 << (btcoex_hw->btactive_gpio * 2)),
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(0x3 << (btcoex_hw->btactive_gpio * 2)));
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ah->btcoex_hw.enabled = true;
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
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void ath9k_hw_btcoex_disable(struct ath_hw *ah)
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{
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struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
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int i;
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btcoex_hw->enabled = false;
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if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
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for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
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REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
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btcoex_hw->wlan_weight[i]);
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return;
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}
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ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
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ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
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AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
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if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
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REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
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REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
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REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
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for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
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REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
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} else
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REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
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}
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
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/*
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* Configures appropriate weight based on stomp type.
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*/
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void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
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enum ath_stomp_type stomp_type)
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{
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if (AR_SREV_9300_20_OR_LATER(ah)) {
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ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
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return;
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}
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switch (stomp_type) {
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case ATH_BTCOEX_STOMP_ALL:
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ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
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AR_STOMP_ALL_WLAN_WGHT, 0);
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break;
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case ATH_BTCOEX_STOMP_LOW:
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ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
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AR_STOMP_LOW_WLAN_WGHT, 0);
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break;
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case ATH_BTCOEX_STOMP_NONE:
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ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
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AR_STOMP_NONE_WLAN_WGHT, 0);
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break;
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default:
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ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
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break;
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}
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}
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EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
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