mirror of https://gitee.com/openkylin/linux.git
103 lines
2.6 KiB
C
103 lines
2.6 KiB
C
/*
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* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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* Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/cp15.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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extern void ox820_secondary_startup(void);
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extern void ox820_cpu_die(unsigned int cpu);
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static void __iomem *cpu_ctrl;
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static void __iomem *gic_cpu_ctrl;
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#define HOLDINGPEN_CPU_OFFSET 0xc8
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#define HOLDINGPEN_LOCATION_OFFSET 0xc4
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#define GIC_NCPU_OFFSET(cpu) (0x100 + (cpu)*0x100)
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#define GIC_CPU_CTRL 0x00
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#define GIC_CPU_CTRL_ENABLE 1
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int __init ox820_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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/*
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* Write the address of secondary startup into the
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* system-wide flags register. The BootMonitor waits
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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*/
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writel(virt_to_phys(ox820_secondary_startup),
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cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET);
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writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET);
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/*
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* Enable GIC cpu interface in CPU Interface Control Register
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*/
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writel(GIC_CPU_CTRL_ENABLE,
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gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL);
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/*
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* Send the secondary CPU a soft interrupt, thereby causing
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* the boot monitor to read the system wide flags register,
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* and branch to the address found there.
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*/
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arch_send_wakeup_ipi_mask(cpumask_of(cpu));
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return 0;
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}
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static void __init ox820_smp_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *np;
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void __iomem *scu_base;
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np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu");
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scu_base = of_iomap(np, 0);
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of_node_put(np);
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if (!scu_base)
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return;
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/* Remap CPU Interrupt Interface Registers */
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np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic");
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gic_cpu_ctrl = of_iomap(np, 1);
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of_node_put(np);
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if (!gic_cpu_ctrl)
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goto unmap_scu;
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np = of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl");
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cpu_ctrl = of_iomap(np, 0);
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of_node_put(np);
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if (!cpu_ctrl)
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goto unmap_scu;
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scu_enable(scu_base);
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flush_cache_all();
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unmap_scu:
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iounmap(scu_base);
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}
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static const struct smp_operations ox820_smp_ops __initconst = {
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.smp_prepare_cpus = ox820_smp_prepare_cpus,
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.smp_boot_secondary = ox820_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = ox820_cpu_die,
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#endif
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};
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CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops);
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