mirror of https://gitee.com/openkylin/linux.git
95 lines
2.7 KiB
C
95 lines
2.7 KiB
C
/*
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* Based on arch/arm/kernel/sys_arm.c
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*
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* Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
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* Copyright (C) 1995, 1996 Russell King.
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/compat.h>
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#include <linux/personality.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/syscalls.h>
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#include <linux/uaccess.h>
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#include <asm/cacheflush.h>
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#include <asm/unistd.h>
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static inline void
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do_compat_cache_op(unsigned long start, unsigned long end, int flags)
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{
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struct mm_struct *mm = current->active_mm;
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struct vm_area_struct *vma;
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if (end < start || flags)
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return;
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down_read(&mm->mmap_sem);
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vma = find_vma(mm, start);
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if (vma && vma->vm_start < end) {
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if (start < vma->vm_start)
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start = vma->vm_start;
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if (end > vma->vm_end)
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end = vma->vm_end;
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up_read(&mm->mmap_sem);
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__flush_cache_user_range(start & PAGE_MASK, PAGE_ALIGN(end));
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return;
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}
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up_read(&mm->mmap_sem);
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}
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/*
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* Handle all unrecognised system calls.
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*/
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long compat_arm_syscall(struct pt_regs *regs)
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{
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unsigned int no = regs->regs[7];
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switch (no) {
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/*
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* Flush a region from virtual address 'r0' to virtual address 'r1'
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* _exclusive_. There is no alignment requirement on either address;
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* user space does not need to know the hardware cache layout.
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*
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* r2 contains flags. It should ALWAYS be passed as ZERO until it
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* is defined to be something else. For now we ignore it, but may
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* the fires of hell burn in your belly if you break this rule. ;)
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*
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* (at a later date, we may want to allow this call to not flush
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* various aspects of the cache. Passing '0' will guarantee that
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* everything necessary gets flushed to maintain consistency in
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* the specified region).
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*/
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case __ARM_NR_compat_cacheflush:
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do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
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return 0;
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case __ARM_NR_compat_set_tls:
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current->thread.tp_value = regs->regs[0];
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/*
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* Protect against register corruption from context switch.
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* See comment in tls_thread_flush.
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*/
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barrier();
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asm ("msr tpidrro_el0, %0" : : "r" (regs->regs[0]));
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return 0;
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default:
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return -ENOSYS;
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}
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}
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