mirror of https://gitee.com/openkylin/linux.git
342 lines
7.4 KiB
C
342 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017-2020 Jacopo Mondi
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* Copyright (C) 2017-2020 Kieran Bingham
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* Copyright (C) 2017-2020 Laurent Pinchart
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* Copyright (C) 2017-2020 Niklas Söderlund
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* Copyright (C) 2016 Renesas Electronics Corporation
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* Copyright (C) 2015 Cogent Embedded, Inc.
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*
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* This file exports functions to control the Maxim MAX9271 GMSL serializer
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* chip. This is not a self-contained driver, as MAX9271 is usually embedded in
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* camera modules with at least one image sensor and optional additional
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* components, such as uController units or ISPs/DSPs.
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*
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* Drivers for the camera modules (i.e. rdacm20/21) are expected to use
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* functions exported from this library driver to maximize code re-use.
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*/
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include "max9271.h"
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static int max9271_read(struct max9271_device *dev, u8 reg)
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{
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int ret;
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dev_dbg(&dev->client->dev, "%s(0x%02x)\n", __func__, reg);
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ret = i2c_smbus_read_byte_data(dev->client, reg);
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if (ret < 0)
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dev_dbg(&dev->client->dev,
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"%s: register 0x%02x read failed (%d)\n",
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__func__, reg, ret);
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return ret;
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}
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static int max9271_write(struct max9271_device *dev, u8 reg, u8 val)
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{
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int ret;
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dev_dbg(&dev->client->dev, "%s(0x%02x, 0x%02x)\n", __func__, reg, val);
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ret = i2c_smbus_write_byte_data(dev->client, reg, val);
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if (ret < 0)
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dev_err(&dev->client->dev,
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"%s: register 0x%02x write failed (%d)\n",
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__func__, reg, ret);
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return ret;
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}
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/*
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* max9271_pclk_detect() - Detect valid pixel clock from image sensor
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*
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* Wait up to 10ms for a valid pixel clock.
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*
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* Returns 0 for success, < 0 for pixel clock not properly detected
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*/
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static int max9271_pclk_detect(struct max9271_device *dev)
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{
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unsigned int i;
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int ret;
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for (i = 0; i < 100; i++) {
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ret = max9271_read(dev, 0x15);
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if (ret < 0)
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return ret;
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if (ret & MAX9271_PCLKDET)
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return 0;
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usleep_range(50, 100);
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}
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dev_err(&dev->client->dev, "Unable to detect valid pixel clock\n");
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return -EIO;
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}
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int max9271_set_serial_link(struct max9271_device *dev, bool enable)
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{
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int ret;
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u8 val = MAX9271_REVCCEN | MAX9271_FWDCCEN;
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if (enable) {
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ret = max9271_pclk_detect(dev);
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if (ret)
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return ret;
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val |= MAX9271_SEREN;
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} else {
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val |= MAX9271_CLINKEN;
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}
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/*
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* The serializer temporarily disables the reverse control channel for
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* 350µs after starting/stopping the forward serial link, but the
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* deserializer synchronization time isn't clearly documented.
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*
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* According to the serializer datasheet we should wait 3ms, while
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* according to the deserializer datasheet we should wait 5ms.
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*
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* Short delays here appear to show bit-errors in the writes following.
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* Therefore a conservative delay seems best here.
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*/
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max9271_write(dev, 0x04, val);
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usleep_range(5000, 8000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_set_serial_link);
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int max9271_configure_i2c(struct max9271_device *dev, u8 i2c_config)
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{
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int ret;
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ret = max9271_write(dev, 0x0d, i2c_config);
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if (ret)
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return ret;
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/* The delay required after an I2C bus configuration change is not
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* characterized in the serializer manual. Sleep up to 5msec to
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* stay safe.
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*/
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_configure_i2c);
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int max9271_set_high_threshold(struct max9271_device *dev, bool enable)
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{
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int ret;
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ret = max9271_read(dev, 0x08);
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if (ret < 0)
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return ret;
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/*
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* Enable or disable reverse channel high threshold to increase
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* immunity to power supply noise.
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*/
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max9271_write(dev, 0x08, enable ? ret | BIT(0) : ret & ~BIT(0));
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usleep_range(2000, 2500);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_set_high_threshold);
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int max9271_configure_gmsl_link(struct max9271_device *dev)
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{
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/*
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* Configure the GMSL link:
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*
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* - Double input mode, high data rate, 24-bit mode
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* - Latch input data on PCLKIN rising edge
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* - Enable HS/VS encoding
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* - 1-bit parity error detection
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*
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* TODO: Make the GMSL link configuration parametric.
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*/
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max9271_write(dev, 0x07, MAX9271_DBL | MAX9271_HVEN |
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MAX9271_EDC_1BIT_PARITY);
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usleep_range(5000, 8000);
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/*
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* Adjust spread spectrum to +4% and auto-detect pixel clock
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* and serial link rate.
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*/
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max9271_write(dev, 0x02, MAX9271_SPREAD_SPECT_4 | MAX9271_R02_RES |
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MAX9271_PCLK_AUTODETECT | MAX9271_SERIAL_AUTODETECT);
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usleep_range(5000, 8000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_configure_gmsl_link);
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int max9271_set_gpios(struct max9271_device *dev, u8 gpio_mask)
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{
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int ret;
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ret = max9271_read(dev, 0x0f);
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if (ret < 0)
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return 0;
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ret |= gpio_mask;
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ret = max9271_write(dev, 0x0f, ret);
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if (ret < 0) {
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dev_err(&dev->client->dev, "Failed to set gpio (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_set_gpios);
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int max9271_clear_gpios(struct max9271_device *dev, u8 gpio_mask)
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{
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int ret;
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ret = max9271_read(dev, 0x0f);
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if (ret < 0)
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return 0;
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ret &= ~gpio_mask;
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ret = max9271_write(dev, 0x0f, ret);
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if (ret < 0) {
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dev_err(&dev->client->dev, "Failed to clear gpio (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_clear_gpios);
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int max9271_enable_gpios(struct max9271_device *dev, u8 gpio_mask)
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{
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int ret;
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ret = max9271_read(dev, 0x0e);
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if (ret < 0)
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return 0;
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/* BIT(0) reserved: GPO is always enabled. */
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ret |= (gpio_mask & ~BIT(0));
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ret = max9271_write(dev, 0x0e, ret);
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if (ret < 0) {
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dev_err(&dev->client->dev, "Failed to enable gpio (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_enable_gpios);
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int max9271_disable_gpios(struct max9271_device *dev, u8 gpio_mask)
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{
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int ret;
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ret = max9271_read(dev, 0x0e);
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if (ret < 0)
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return 0;
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/* BIT(0) reserved: GPO cannot be disabled */
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ret &= ~(gpio_mask | BIT(0));
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ret = max9271_write(dev, 0x0e, ret);
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if (ret < 0) {
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dev_err(&dev->client->dev, "Failed to disable gpio (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_disable_gpios);
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int max9271_verify_id(struct max9271_device *dev)
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{
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int ret;
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ret = max9271_read(dev, 0x1e);
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if (ret < 0) {
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dev_err(&dev->client->dev, "MAX9271 ID read failed (%d)\n",
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ret);
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return ret;
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}
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if (ret != MAX9271_ID) {
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dev_err(&dev->client->dev, "MAX9271 ID mismatch (0x%02x)\n",
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ret);
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return -ENXIO;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_verify_id);
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int max9271_set_address(struct max9271_device *dev, u8 addr)
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{
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int ret;
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ret = max9271_write(dev, 0x00, addr << 1);
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if (ret < 0) {
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dev_err(&dev->client->dev,
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"MAX9271 I2C address change failed (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_set_address);
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int max9271_set_deserializer_address(struct max9271_device *dev, u8 addr)
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{
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int ret;
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ret = max9271_write(dev, 0x01, addr << 1);
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if (ret < 0) {
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dev_err(&dev->client->dev,
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"MAX9271 deserializer address set failed (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_set_deserializer_address);
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int max9271_set_translation(struct max9271_device *dev, u8 source, u8 dest)
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{
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int ret;
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ret = max9271_write(dev, 0x09, source << 1);
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if (ret < 0) {
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dev_err(&dev->client->dev,
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"MAX9271 I2C translation setup failed (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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ret = max9271_write(dev, 0x0a, dest << 1);
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if (ret < 0) {
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dev_err(&dev->client->dev,
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"MAX9271 I2C translation setup failed (%d)\n", ret);
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return ret;
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}
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usleep_range(3500, 5000);
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return 0;
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}
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EXPORT_SYMBOL_GPL(max9271_set_translation);
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