linux/arch/arm/include
Will Deacon 62cbbc42e0 ARM: tlb: reduce scope of barrier domains for TLB invalidation
Our TLB invalidation routines may require a barrier before the
maintenance (in order to ensure pending page table writes are visible to
the hardware walker) and barriers afterwards (in order to ensure
completion of the maintenance and visibility in the instruction stream).

Whilst this is expensive, the cost can be reduced somewhat by reducing
the scope of the barrier instructions:

  - The barrier before only needs to apply to stores (pte writes)
  - Local ops are required only to affect the non-shareable domain
  - Global ops are required only to affect the inner-shareable domain

This patch makes these changes for the TLB flushing code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2013-08-12 12:25:45 +01:00
..
asm ARM: tlb: reduce scope of barrier domains for TLB invalidation 2013-08-12 12:25:45 +01:00
debug Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm 2013-07-03 09:46:29 -07:00
uapi/asm ARM: 7791/1: a.out: remove partial a.out support 2013-07-26 12:02:10 +01:00